fe_write
fe_write(sc, RA_FE_GLOBAL_RESET, FE_GLOBAL_RESET_PSE);
fe_write(sc, RA_FE_GLOBAL_RESET, 0);
fe_write(sc, RA_FE_PDMA_TX0_CPU_IDX, tx_cpu_idx);
fe_write(sc, RA_FE_INT_STATUS, ~0);
fe_write(sc, RA_FE_PDMA_RX0_CPU_IDX, rx_cpu_idx);
fe_write(sc, RA_FE_MDIO_ACCESS,
fe_write(sc, RA_FE_MDIO_ACCESS,
fe_write(sc, RA_FE_MDIO_ACCESS,
fe_write(sc, RA_FE_MDIO_ACCESS,
fe_write(sc, RA_FE_GDMA1_MAC_LSB,
fe_write(sc, RA_FE_GDMA1_MAC_MSB,
fe_write(sc, RA_FE_MDIO_CFG1,
fe_write(sc, RA_FE_PDMA_GLOBAL_CFG, r);
fe_write(sc, RA_FE_VLAN_ID_0001, 0x00010000);
fe_write(sc, RA_FE_VLAN_ID_0203, 0x00030002);
fe_write(sc, RA_FE_VLAN_ID_0405, 0x00050004);
fe_write(sc, RA_FE_VLAN_ID_0607, 0x00070006);
fe_write(sc, RA_FE_VLAN_ID_0809, 0x00090008);
fe_write(sc, RA_FE_VLAN_ID_1011, 0x000b000a);
fe_write(sc, RA_FE_VLAN_ID_1213, 0x000d000c);
fe_write(sc, RA_FE_VLAN_ID_1415, 0x000f000e);
fe_write(sc, RA_FE_PDMA_TX0_PTR,
fe_write(sc, RA_FE_PDMA_TX0_COUNT, htole32(RALINK_ETH_NUM_TX_DESC));
fe_write(sc, RA_FE_PDMA_TX0_CPU_IDX, 0);
fe_write(sc, RA_FE_PDMA_RESET_IDX, PDMA_RST_TX0);
fe_write(sc, RA_FE_PDMA_RX0_PTR,
fe_write(sc, RA_FE_PDMA_RX0_COUNT, htole32(RALINK_ETH_NUM_RX_DESC));
fe_write(sc, RA_FE_PDMA_RX0_CPU_IDX,
fe_write(sc, RA_FE_PDMA_RESET_IDX, PDMA_RST_RX0);
fe_write(sc, RA_FE_PDMA_RX0_CPU_IDX,
fe_write(sc, RA_FE_PDMA_GLOBAL_CFG,
fe_write(sc, RA_FE_SDM_CON, 0x8100);
fe_write(sc, RA_FE_GLOBAL_CFG,
fe_write(sc, RA_FE_INT_MASK,
fe_write(sc, RA_FE_INT_ENABLE,
fe_write(sc, RA_FE_GDMA1_FWD_CFG,
fe_write(sc, RA_FE_GDMA1_FWD_CFG,
fe_write(sc, RA_FE_CDMA_CSG_CFG, r);
fe_write(sc, RA_FE_PSE_FQ_CFG,
fe_write(sc, RA_FE_PSE_FQ_CFG,