exi_softc
struct exi_softc * const sc = device_private(self);
exi_softc = sc;
error = bus_dmamap_create(exi_softc->sc_dmat, EXI_MAX_DMA, 1,
struct exi_softc * const sc = device_private(self);
ch = &exi_softc->sc_chan[chan];
val = RD4(exi_softc, EXI_CSR(chan));
WR4(exi_softc, EXI_CSR(chan), val);
ch = &exi_softc->sc_chan[chan];
val = RD4(exi_softc, EXI_CSR(chan));
WR4(exi_softc, EXI_CSR(chan), val);
val = RD4(exi_softc, EXI_CR(chan));
ch = &exi_softc->sc_chan[chan];
WR4(exi_softc, EXI_DATA(chan), val);
WR4(exi_softc, EXI_CR(chan),
ch = &exi_softc->sc_chan[chan];
WR4(exi_softc, EXI_CR(chan),
val = RD4(exi_softc, EXI_DATA(chan));
ch = &exi_softc->sc_chan[chan];
WR4(exi_softc, EXI_DATA(chan), val);
WR4(exi_softc, EXI_CR(chan),
val = RD4(exi_softc, EXI_DATA(chan));
ch = &exi_softc->sc_chan[chan];
error = bus_dmamap_load(exi_softc->sc_dmat, ch->ch_dmamap,
device_printf(exi_softc->sc_dev, "can't load DMA handle: %d\n",
bus_dmamap_sync(exi_softc->sc_dmat, ch->ch_dmamap, 0, datalen,
WR4(exi_softc, EXI_MAR(chan), ch->ch_dmamap->dm_segs[0].ds_addr);
WR4(exi_softc, EXI_LENGTH(chan), datalen);
WR4(exi_softc, EXI_CR(chan),
bus_dmamap_sync(exi_softc->sc_dmat, ch->ch_dmamap, 0, datalen,
bus_dmamap_unload(exi_softc->sc_dmat, ch->ch_dmamap);
static struct exi_softc *exi_softc;
CFATTACH_DECL_NEW(exi, sizeof(struct exi_softc),