elmr_write
(ret = elmr_write(adap, VSC_REG(2, 0, 0x10 + i),
(ret = elmr_write(adap, VSC_REG(2, 0, 0x40 + i),
(ret = elmr_write(adap, VSC_REG(2, 0, 0x50 + i), 1)) ||
(ret = elmr_write(adap, VSC_REG(2, 1, 0x10 + i),
(ret = elmr_write(adap, VSC_REG(2, 1, 0x40 + i),
(ret = elmr_write(adap, VSC_REG(2, 1, 0x50 + i), 0)))
if ((ret = elmr_write(adap, VSC_REG(1, i, 0), 0xa59c)) ||
(ret = elmr_write(adap, VSC_REG(1, i, 5),
(ret = elmr_write(adap, VSC_REG(1, i, 0xb), 0x96)) ||
(ret = elmr_write(adap, VSC_REG(1, i, 0x15), 0x21)) ||
(ret = elmr_write(adap, ELMR_THRES0 + i, 768)))
if ((ret = elmr_write(adap, ELMR_BW, 7)))
if ((r = elmr_write(adap, VSC_REG(1, port, 0),
(r = elmr_write(adap, VSC_REG(1, port, 0xb),
(r = elmr_write(adap, VSC_REG(1, port, 0xb),
(r = elmr_write(adap, VSC_REG(1, port, 0),
return elmr_write(adap, VSC_REG(1, port, 1), r);
return elmr_write(adap, VSC_REG(1, port, 2), mtu);
ret = elmr_write(adap, VSC_REG(1, port, 3),
ret = elmr_write(adap, VSC_REG(1, port, 4),
ret = elmr_write(adap, VSC_REG(1, port, 0), v);
ret = elmr_write(adap, VSC_REG(1, port, 0), v);