sys/arch/algor/algor/algor_p4032_bus_locio.c

62

#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v)

sys/arch/algor/algor/algor_p4032_bus_mem.c

66

#define CHIP_W1_SYS_END(v) (P4032_ISAMEM + CHIP_W1_BUS_END(v))

sys/arch/algor/algor/algor_p5064_bus_mem.c

62

#define CHIP_W1_SYS_END(v) (P5064_ISAMEM + CHIP_W1_BUS_END(v))

sys/arch/evbmips/malta/malta_bus_io.c

64

CHIP_W1_BUS_END(v))

sys/arch/evbmips/malta/malta_bus_mem.c

71

CHIP_W1_BUS_END(v))

sys/arch/evbmips/malta/malta_bus_mem.c

79

CHIP_W1_BUS_END(v))

sys/arch/evbmips/mipssim/mipssim_bus_io.c

54

#define CHIP_W1_SYS_END(v) (CHIP_W1_SYS_START(v) + CHIP_W1_BUS_END(v))

sys/arch/mips/adm5120/adm5120_extio_space.c

79

#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v)

sys/arch/mips/adm5120/adm5120_obio_space.c

82

#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v)

sys/arch/mips/adm5120/adm5120_pciio_space.c

52

#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v)

sys/arch/mips/adm5120/adm5120_pcimem_space.c

52

#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v)

sys/arch/mips/alchemy/au_cpureg_mem.c

53

#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v)

sys/arch/mips/atheros/arbus.c

223

#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v)

sys/arch/mips/atheros/arbusle.c

50

#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v)

sys/arch/mips/atheros/dev/arpci.c

340

#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v)

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1330

(bus_addr_t)CHIP_W1_BUS_END(v));

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1333

CHIP_W1_BUS_END(v) - CHIP_W1_BUS_START(v) + 1, EX_NOWAIT);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

249

mbst->mbst_bus_end = CHIP_W1_BUS_END(v);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

303

if (addr >= CHIP_W1_BUS_START(v) && end <= CHIP_W1_BUS_END(v))

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

321

(u_long)CHIP_W1_BUS_START(v), (u_long)CHIP_W1_BUS_END(v));

sys/arch/mips/ralink/ralink_bus.c

117

#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v)

sys/arch/mips/rmi/rmixl_pci_cfg_space.c

63

#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v)

sys/arch/mips/rmi/rmixl_pci_ecfg_space.c

63

#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v)

sys/arch/mips/rmi/rmixl_pci_io_space.c

61

#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v)

sys/arch/mips/rmi/rmixl_pci_mem_space.c

61

#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v)

sys/arch/mips/sibyte/pci/sbbrz_bus_io.c

55

#define CHIP_W1_SYS_END(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES + CHIP_W1_BUS_END(v))

sys/arch/mips/sibyte/pci/sbbrz_bus_mem.c

55

#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v)