CHIP_V
#define CHIP_IO_ARENA(v) (CHIP_V(v)->jc_io_arena)
#define CHIP_S_MEM_ARENA(v) (CHIP_V(v)->jc_s_mem_arena)
#define CHIP_IO_ARENA(v) (CHIP_V(v)->tc_io_arena)
#define CHIP_IO_ARENA_STORE(v) (&(CHIP_V(v)->tc_io_arena_store))
#define CHIP_IO_BTAG_STORE(v) (CHIP_V(v)->tc_io_btag_store)
(CHIP_V(v)->tc_io_bus_start)
(CHIP_IO_W1_BUS_START(v) + CHIP_V(v)->tc_sysmap->tsmap_sio_bussize - 1)
(ttwoga_gamma_cbus_bias + CHIP_V(v)->tc_sysmap->tsmap_sio_base)
(CHIP_IO_W1_SYS_START(v) + CHIP_V(v)->tc_sysmap->tsmap_sio_syssize - 1)
#define CHIP_D_MEM_ARENA(v) (CHIP_V(v)->tc_d_mem_arena)
#define CHIP_D_MEM_ARENA_STORE(v) (&(CHIP_V(v)->tc_d_mem_arena_store))
#define CHIP_D_MEM_BTAG_STORE(v) (CHIP_V(v)->tc_d_mem_btag_store)
#define CHIP_S_MEM_ARENA(v) (CHIP_V(v)->tc_s_mem_arena)
#define CHIP_S_MEM_ARENA_STORE(v) (&(CHIP_V(v)->tc_s_mem_arena_store))
#define CHIP_S_MEM_BTAG_STORE(v) (CHIP_V(v)->tc_s_mem_btag_store)
(CHIP_V(v)->tc_d_mem_bus_start)
(CHIP_D_MEM_W1_BUS_START(v) + CHIP_V(v)->tc_sysmap->tsmap_dmem_bussize - 1)
(ttwoga_gamma_cbus_bias + CHIP_V(v)->tc_sysmap->tsmap_dmem_base)
(CHIP_D_MEM_W1_SYS_START(v) + CHIP_V(v)->tc_sysmap->tsmap_dmem_syssize - 1)
(CHIP_V(v)->tc_s_mem_bus_start)
(CHIP_S_MEM_W1_BUS_START(v) + CHIP_V(v)->tc_sysmap->tsmap_smem_bussize - 1)
(ttwoga_gamma_cbus_bias + CHIP_V(v)->tc_sysmap->tsmap_smem_base)
(CHIP_S_MEM_W1_SYS_START(v) + CHIP_V(v)->tc_sysmap->tsmap_smem_syssize - 1)