dmac
templo = dmac + 0x0018;/* RO T7 T6 T5 T4 T3 T2 T1 T0 */
temphi = dmac + 0x0218;/* RO T15 T14 T13 T12 T11 T10 T9 T8 */
struct dma_regs *dmac = sc->sc_regs;
dmac->ctl = DC_CTL_RST;
dmac->ctl = 0;
dmac->tcnt = (uint32_t)len;
dmac->offset = offset;
dmac->tag = 0;
dmac->mapent = kvtop((void *)addr) >> DMAC_SEG_SHIFT;
dmac->tag = i;
dmac->mapent = kvtop((void *)addr) >> DMAC_SEG_SHIFT;
dmac->tag = 0;
dmac->ctl = 0;
dmac->ctl = DC_CTL_ENB;
dmac->ctl = DC_CTL_MOD;
dmac->ctl = DC_CTL_MOD | DC_CTL_ENB;
struct dma_regs *dmac = sc->sc_regs;
if ((dmac->stat & DC_ST_INT) != 0)
struct dma_regs *dmac = sc->sc_regs;
if ((dmac->stat & DC_ST_INT) == 0) {
resid = dmac->tcnt;
dmac->ctl &= ~DC_CTL_ENB;
dmac->ctl = DC_CTL_RST;
dmac->ctl = 0;
CFATTACH_DECL_NEW(dmac, sizeof(struct dmac3_softc),
evcnt_attach_static(&_playstation2_evcnt.dmac);
_playstation2_evcnt.dmac.ev_count++;
_playstation2_evcnt.dmac.ev_count,
.dmac = EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, "hard", "dmac"),
struct evcnt clock, sbus, dmac;
struct dmac_softc *dmac = device_private(intio->sc_dmac);
struct dmac_channel_stat *chan = &dmac->sc_channels[ch];
aprint_normal_dev(dmac->sc_dev, "allocating ch %d for %s.\n",
bus_space_write_1(dmac->sc_bst, chan->ch_bht, DMAC_REG_CSR, 0xff);
bus_space_write_1(dmac->sc_bst, chan->ch_bht,
bus_space_write_1(dmac->sc_bst, chan->ch_bht, DMAC_REG_CPR, 0);
bus_space_write_1(dmac->sc_bst, chan->ch_bht,
bus_space_write_1(dmac->sc_bst, chan->ch_bht,
bus_space_write_1(dmac->sc_bst, chan->ch_bht,
bus_space_write_1(dmac->sc_bst, chan->ch_bht, DMAC_REG_NIVR, normalv);
bus_space_write_1(dmac->sc_bst, chan->ch_bht, DMAC_REG_EIVR, errorv);
struct dmac_softc *dmac = device_private(intio->sc_dmac);
struct dmac_channel_stat *chan = &dmac->sc_channels[ch];
dmac_load_xfer(struct dmac_softc *dmac, struct dmac_dma_xfer *xf)
bus_space_write_1(dmac->sc_bst, chan->ch_bht, DMAC_REG_CSR, 0xff);
bus_space_write_1(dmac->sc_bst, chan->ch_bht, DMAC_REG_SCR, xf->dx_scr);
bus_space_write_1(dmac->sc_bst, chan->ch_bht,
bus_space_write_4(dmac->sc_bst, chan->ch_bht,
struct dmac_softc *dmac = chan->ch_softc;
dmac_load_xfer(dmac, xf);
dmac_start_xfer(struct dmac_softc *dmac, struct dmac_dma_xfer *xf)
return dmac_start_xfer_offset(dmac, xf, 0, 0);
dmac_start_xfer_offset(struct dmac_softc *dmac, struct dmac_dma_xfer *xf,
csr = bus_space_read_1(dmac->sc_bst, chan->ch_bht, DMAC_REG_CSR);
bus_space_write_4(dmac->sc_bst, chan->ch_bht,
bus_space_write_2(dmac->sc_bst, chan->ch_bht,
bus_space_write_4(dmac->sc_bst, chan->ch_bht,
bus_space_write_2(dmac->sc_bst, chan->ch_bht,
c = dmac_program_arraychain(dmac->sc_dev, xf, offset, size);
bus_space_write_4(dmac->sc_bst, chan->ch_bht,
bus_space_write_2(dmac->sc_bst, chan->ch_bht,
bus_space_write_1(dmac->sc_bst, chan->ch_bht, DMAC_REG_CSR, 0xff);
bus_space_write_1(dmac->sc_bst, chan->ch_bht, DMAC_REG_CCR, go);
dmac_abort_xfer(struct dmac_softc *dmac, struct dmac_dma_xfer *xf)
bus_space_write_1(dmac->sc_bst, chan->ch_bht, DMAC_REG_CCR,
bus_space_write_1(dmac->sc_bst, chan->ch_bht, DMAC_REG_CSR, 0xff);
CFATTACH_DECL_NEW(dmac, sizeof(struct dmac_softc),
struct dmac io_dma[4]; /* 0x00e84000 */
rom->dmac = (sti_dmac_t)O(STI_DMA_CTRL);
STI_DEP(dmac);
sti_dmac_t dmac;
u_char dmac;
dmac = GUSMASK_SAMPLE_IRQ|GUSMASK_SAMPLE_START;
dmac |= GUSMASK_SAMPLE_DATA16;
dmac |= GUSMASK_SAMPLE_INVBIT;
dmac |= GUSMASK_SAMPLE_STEREO;
bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, dmac); /* Go! */
memcpy(e->dmac, RT_ENADDR(e->neigh), sizeof(e->dmac));
memcpy(req->dst_mac, e->dmac, sizeof(req->dst_mac));
if (memcmp(e->dmac, RT_ENADDR(neigh), sizeof(e->dmac)) ||
if (memcmp(e->dmac, RT_ENADDR(neigh), 6))
if (memcmp(e->dmac, RT_ENADDR(neigh), sizeof(e->dmac)))
e->idx, ip, e->dmac[0], e->dmac[1], e->dmac[2],
e->dmac[3], e->dmac[4], e->dmac[5],
uint8_t dmac[6]; /* neighbour's MAC address */
if (sc->dmac == 0) { /* Disabling it */
uint32_t dmac = pba - max_frame_size / 512;
if (dmac < pba - 10)
dmac = pba - 10;
reg |= (dmac << IGC_DMACR_DMACTHR_SHIFT) & IGC_DMACR_DMACTHR_MASK;
reg |= (sc->dmac * 5) >> 6;
reg |= sc->dmac >> 5;
uint32_t dmac;
sc->dmac = 0;
sc->dmac = 0;
if (dcfg->watchdog_timer ^ sc->dmac ||
dcfg->watchdog_timer = sc->dmac;
newval = sc->dmac;
sc->dmac = 0;
sc->dmac = 1000;
sc->dmac = newval;
u16 dmac;