cycle
if (cycle)
if ((!cycle) && (edge == 1))
if (cycle)
if ((!cycle) && (edge == 1))
if (cycle) {
if (cycle)
if ((!cycle) && (edge == 1))
if (cycle)
if ((!cycle) && (edge == 1))
int neighbour, cycle, row_major, edge;
cycle = ((menu->opts & O_NONCYCLIC) != O_NONCYCLIC);
if (cycle) {
int cycle; /* minimum cycle time [ns] */
min_cycle = pio_timing[piomode].cycle;
min_cycle = dma_timing[dmamode].cycle;
min_cycle = pio_timing[piomode].cycle;
min_cycle = dma_timing[dmamode].cycle;
min_cycle = udma_timing[udmamode].cycle;
RISCVREG_READ_INLINE(cycle)
int sec, cycle, cycle_match;
cycle = cycle_now & 0x1fff;
cycle = cycle + CYCLE_DELAY;
if (cycle >= 8000) {
cycle -= 8000;
cycle = roundup2(cycle, CYCLE_MOD);
if (cycle >= 8000) {
if (cycle == 8000)
cycle = 0;
cycle = CYCLE_MOD;
cycle_match = ((sec << 13) | cycle) & 0x7ffff;
int len, int cycle)
if (basepipe == 16 && dir == PIPEoutput && cycle == 0)
cycle = sc->sc_chi_bpf;
while (sc->sc_pipe[nextpipe].cycle < cycle &&
sc->sc_pipe[pipe].cycle = cycle;
*(cmd++) = DBRI_TS_LEN(len) | DBRI_TS_CYCLE(cycle) |
*(cmd++) = DBRI_TS_LEN(len) | DBRI_TS_CYCLE(cycle) |
int cycle; /* offset of timeslot (bits) */
int cycle;
b->cycle = cycle_target;
const int cycle = b->cycle;
todo = target - cycle;
b->cycle = target;
cycle {
if (!gn->flags.cycle) {
gn->flags.cycle = true;
Buf_AddFlag(&buf, flags.cycle, "CYCLE");
bool cycle:1;
&& !flags.cycle
int lsystem=-1, pad_acc, cycle_acc, cycle, f_frac;
cycle_acc = cycle = 0;
cycle = 1;
cycle_acc = frame_cycle[lsystem].d * cycle;
ciph->fdf.dv.cyc = htons(cycle << 12 | f_frac);
cycle ++;
cycle ++;