cr0
int brd, cr0;
cr0 = cflag2cr0(cflag);
bus_space_write_4(iot, *iohp, SACOM_CR0, cr0);
u_int cr0;
cr0 = (cflag & PARENB) ? CR0_PE : 0;
cr0 |= (cflag & PARODD) ? 0 : CR0_OES;
cr0 |= (cflag & CSTOPB) ? CR0_SBS : 0;
cr0 |= ((cflag & CSIZE) == CS8) ? CR0_DSS : 0;
return cr0;
u_int cr0;
cr0 = cflag2cr0(t->c_cflag);
sc->sc_cr0 = cr0;
uint32_t origcr0, cr0;
origcr0 = cr0 = rcr0();
cr0 |= CR0_CD;
lcr0(cr0);
uint32_t cr0, status, nbytes;
cr0 = rcr0();
lcr0(cr0 & ~(CR0_EM|CR0_TS));
lcr0(cr0);
uint32_t cr0;
origcr0 = cr0 = rcr0();
cr0 |= CR0_CD;
cr0 &= ~CR0_NW;
lcr0(cr0);
unsigned int cr0;
cr0 = rcr0(); /* Permit access to SIMD/FPU path */
lcr0(cr0 & ~(CR0_EM|CR0_TS));
lcr0(cr0);
if ((vmcb->state.cr0 ^
vmcb->state.cr0 = state->crs[NVMM_X64_CR_CR0];
state->crs[NVMM_X64_CR_CR0] = vmcb->state.cr0;
uint64_t cr0;
uint64_t cr0, cr3, cr4, efer;
cr0 = vmx_vmread(VMCS_GUEST_CR0);
if ((cr0 ^ state->crs[NVMM_X64_CR_CR0]) & CR0_TLB_FLUSH) {