Symbol: CEMAC_WRITE
sys/dev/cadence/if_cemac.c
1001
CEMAC_WRITE(GEM_DMA_CFG, dma);
sys/dev/cadence/if_cemac.c
1009
CEMAC_WRITE(ETH_CFG, cfg);
sys/dev/cadence/if_cemac.c
1014
CEMAC_WRITE(ETH_IDR, -1);
sys/dev/cadence/if_cemac.c
1015
CEMAC_WRITE(ETH_IER, ETH_ISR_RCOM | ETH_ISR_TBRE | ETH_ISR_TIDLE
sys/dev/cadence/if_cemac.c
1019
CEMAC_WRITE(ETH_CTL, ETH_CTL_TE | ETH_CTL_RE | ETH_CTL_ISR
sys/dev/cadence/if_cemac.c
1053
CEMAC_WRITE(ETH_CTL, ETH_CTL_MPE); // disable everything
sys/dev/cadence/if_cemac.c
1054
CEMAC_WRITE(ETH_IDR, -1); // disable interrupts
sys/dev/cadence/if_cemac.c
1057
CEMAC_WRITE(ETH_CFG,
sys/dev/cadence/if_cemac.c
1060
CEMAC_WRITE(ETH_CFG,
sys/dev/cadence/if_cemac.c
1065
CEMAC_WRITE(ETH_TSR, (u & (ETH_TSR_UND | ETH_TSR_COMP | ETH_TSR_BNQ
sys/dev/cadence/if_cemac.c
1069
CEMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));
sys/dev/cadence/if_cemac.c
1096
CEMAC_WRITE(ETH_CTL, ctl & ~ETH_CTL_RE);
sys/dev/cadence/if_cemac.c
1169
CEMAC_WRITE(ETH_SA2L, (ias[0][3] << 24)
sys/dev/cadence/if_cemac.c
1172
CEMAC_WRITE(ETH_SA2H, (ias[0][4] << 8)
sys/dev/cadence/if_cemac.c
1180
CEMAC_WRITE(ETH_SA3L, (ias[1][3] << 24)
sys/dev/cadence/if_cemac.c
1183
CEMAC_WRITE(ETH_SA3H, (ias[1][4] << 8)
sys/dev/cadence/if_cemac.c
1191
CEMAC_WRITE(ETH_SA4L, (ias[2][3] << 24)
sys/dev/cadence/if_cemac.c
1194
CEMAC_WRITE(ETH_SA4H, (ias[2][4] << 8)
sys/dev/cadence/if_cemac.c
1199
CEMAC_WRITE(ETH_CFG, cfg);
sys/dev/cadence/if_cemac.c
1200
CEMAC_WRITE(ETH_CTL, ctl | ETH_CTL_RE);
sys/dev/cadence/if_cemac.c
168
CEMAC_WRITE(ETH_CTL, 0); // disable everything
sys/dev/cadence/if_cemac.c
169
CEMAC_WRITE(ETH_IDR, -1); // disable interrupts
sys/dev/cadence/if_cemac.c
170
CEMAC_WRITE(ETH_RBQP, 0); // clear receive
sys/dev/cadence/if_cemac.c
171
CEMAC_WRITE(ETH_TBQP, 0); // clear transmit
sys/dev/cadence/if_cemac.c
173
CEMAC_WRITE(ETH_CFG,
sys/dev/cadence/if_cemac.c
176
CEMAC_WRITE(ETH_CFG,
sys/dev/cadence/if_cemac.c
181
CEMAC_WRITE(ETH_TSR, (u & (ETH_TSR_UND | ETH_TSR_COMP | ETH_TSR_BNQ
sys/dev/cadence/if_cemac.c
185
CEMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));
sys/dev/cadence/if_cemac.c
212
CEMAC_WRITE(ETH_TSR, tsr);
sys/dev/cadence/if_cemac.c
271
CEMAC_WRITE(ETH_ISR, isr);
sys/dev/cadence/if_cemac.c
289
CEMAC_WRITE(ETH_RSR, ETH_RSR_BNA);
sys/dev/cadence/if_cemac.c
293
CEMAC_WRITE(ETH_CTL, ctl & ~ETH_CTL_RE);
sys/dev/cadence/if_cemac.c
295
CEMAC_WRITE(ETH_RSR, ETH_RSR_BNA);
sys/dev/cadence/if_cemac.c
297
CEMAC_WRITE(ETH_CTL, ctl | ETH_CTL_RE);
sys/dev/cadence/if_cemac.c
305
CEMAC_WRITE(ETH_RSR, ETH_RSR_OVR);
sys/dev/cadence/if_cemac.c
436
CEMAC_WRITE(ETH_CTL, ETH_CTL_MPE); // disable everything
sys/dev/cadence/if_cemac.c
437
CEMAC_WRITE(ETH_IDR, -1); // disable interrupts
sys/dev/cadence/if_cemac.c
438
CEMAC_WRITE(ETH_RBQP, 0); // clear receive
sys/dev/cadence/if_cemac.c
439
CEMAC_WRITE(ETH_TBQP, 0); // clear transmit
sys/dev/cadence/if_cemac.c
441
CEMAC_WRITE(ETH_CFG,
sys/dev/cadence/if_cemac.c
444
CEMAC_WRITE(ETH_CFG,
sys/dev/cadence/if_cemac.c
447
CEMAC_WRITE(GEM_DMA_CFG,
sys/dev/cadence/if_cemac.c
457
CEMAC_WRITE(ETH_TSR, (u & (ETH_TSR_UND | ETH_TSR_COMP | ETH_TSR_BNQ
sys/dev/cadence/if_cemac.c
461
CEMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));
sys/dev/cadence/if_cemac.c
605
CEMAC_WRITE(ETH_RBQP, (uint32_t)sc->rbqpage_dsaddr);
sys/dev/cadence/if_cemac.c
606
CEMAC_WRITE(ETH_TBQP, (uint32_t)sc->tbqpage_dsaddr);
sys/dev/cadence/if_cemac.c
624
CEMAC_WRITE(ETH_IDR, -1);
sys/dev/cadence/if_cemac.c
625
CEMAC_WRITE(ETH_IER, ETH_ISR_RCOM | ETH_ISR_TBRE | ETH_ISR_TIDLE
sys/dev/cadence/if_cemac.c
630
CEMAC_WRITE(ETH_CTL, ETH_CTL_TE | ETH_CTL_RE | ETH_CTL_ISR
sys/dev/cadence/if_cemac.c
688
CEMAC_WRITE(ETH_MAN, (ETH_MAN_HIGH | ETH_MAN_RW_RD
sys/dev/cadence/if_cemac.c
704
CEMAC_WRITE(ETH_MAN, (ETH_MAN_HIGH | ETH_MAN_RW_WR
sys/dev/cadence/if_cemac.c
747
CEMAC_WRITE(ETH_CFG, reg);
sys/dev/cadence/if_cemac.c
879
CEMAC_WRITE(ETH_IER, ETH_ISR_TBRE);
sys/dev/cadence/if_cemac.c
955
CEMAC_WRITE(ETH_CTL, ctl);
sys/dev/cadence/if_cemac.c
959
CEMAC_WRITE(ETH_TAR, segs->ds_addr);
sys/dev/cadence/if_cemac.c
960
CEMAC_WRITE(ETH_TCR, m->m_pkthdr.len);