cpsw_read_4
while (cpsw_read_4(sc, CPSW_WR_SOFT_RESET) & 1)
while (cpsw_read_4(sc, CPSW_SS_SOFT_RESET) & 1)
while (cpsw_read_4(sc, CPSW_SL_SOFT_RESET(i)) & 1)
while (cpsw_read_4(sc, CPSW_CPDMA_SOFT_RESET) & 1)
cpsw_read_4(sc, CPSW_CPDMA_RX_CP(0)), 0, 0);
tx0_cp = cpsw_read_4(sc, CPSW_CPDMA_TX_CP(0));
tx0_cp = cpsw_read_4(sc, CPSW_CPDMA_TX_CP(0));
if (cpsw_read_4(sc, CPSW_CPDMA_TX_HDP(0)) == 0) {
cpsw_read_4(sc, CPSW_CPDMA_TX_CP(0)),
cpsw_read_4(sc, CPSW_CPDMA_TX_HDP(0)), 0, 0);
miscstat = cpsw_read_4(sc, CPSW_WR_C_MISC_STAT(0));
dmastat = cpsw_read_4(sc, CPSW_CPDMA_DMA_INTSTAT_MASKED);
stat = cpsw_read_4(sc, CPSW_CPDMA_DMASTATUS);
stat = cpsw_read_4(sc, CPSW_CPDMA_TX_HDP(0));
stat = cpsw_read_4(sc, CPSW_CPDMA_TX_CP(0));
stat = cpsw_read_4(sc, CPSW_CPDMA_RX_HDP(0));
stat = cpsw_read_4(sc, CPSW_CPDMA_RX_CP(0));
dmastat = cpsw_read_4(sc, CPSW_CPDMA_DMA_INTSTAT_MASKED);
ale_entry[0] = cpsw_read_4(sc, CPSW_ALE_TBLW0);
ale_entry[1] = cpsw_read_4(sc, CPSW_ALE_TBLW1);
ale_entry[2] = cpsw_read_4(sc, CPSW_ALE_TBLW2);
cpsw_read_4(sc, CPSW_CPDMA_TX_CP(0)),
cpsw_read_4(sc, CPSW_CPDMA_TX_HDP(0)), txstart, eopi);
if ((cpsw_read_4(sc, reg) & __BIT(31)) == 0)
v = cpsw_read_4(sc, MDIOUSERACCESS0);
v = cpsw_read_4(sc, MDIOUSERACCESS0);
while (cpsw_read_4(sc, CPSW_WR_SOFT_RESET) & 1)
while (cpsw_read_4(sc, CPSW_SS_SOFT_RESET) & 1)
while (cpsw_read_4(sc, CPSW_SL_SOFT_RESET(i)) & 1)
while (cpsw_read_4(sc, CPSW_CPDMA_SOFT_RESET) & 1)