ci_ipending
ci->ci_ipending = 0;
KASSERT(ci->ci_ipending == 0);
ci->ci_ipending |= hppa_intr_ipending(&ci->ci_ir, eirr);
while (ci->ci_ipending & ~ci->ci_cpl) {
ci->ci_ipending |= hppa_intr_ipending(sir, lvl);
__func__, ci->ci_ipending, ci->ci_cpl, shared);
ipending_run = (ci->ci_ipending & ~ncpl);
ci->ci_ipending &= ~(1 << bit_pos);
volatile int ci_ipending; /* The pending interrupts. */
ci->ci_ipending = 0;
ci->ci_ipending |= PIC_VIRQ_TO_MASK(virq);
while ((vpend = (ci->ci_ipending & ~imask[pcpl])) != 0) {
KASSERT((PIC_VIRQ_TO_MASK(0) & ci->ci_ipending) == 0);
ci->ci_ipending &= ~PIC_VIRQ_TO_MASK(virq);
if (__predict_false(ci->ci_ipending & ~imask[pcpl]))
ci->ci_ipending |= v_imen; /* Masked! Mark this as pending */
ci->ci_ipending &= ~v_imen;
if (ci->ci_ipending & ~imask[ncpl])
uint64_t ci_ipending:56;
ci->ci_ipending |= bit;
ci->ci_ipending &= ~(1ULL << ih->ih_slot);
while (oldci->ci_ipending & (1ULL << oldslot)) {
} else if (ci->ci_ipending & (1ULL << LIR_TIMER))
level, (uint64_t)ci->ci_ilevel, (uint64_t)ci->ci_ipending);
ci->ci_ipending |= imask;
KASSERT(curcpu()->ci_ipending == 0);
KASSERT(curcpu()->ci_ipending == 0);
int xci_ipending = ci->ci_ipending;