cca
ACPI_INTEGER cca = 1; /* default cache coherent */
rv = acpi_eval_integer(ad->ad_handle, "_CCA", &cca);
return cca ? _BUS_DMAMAP_COHERENT : 0;
#define MIPS_PHYS_TO_XKPHYS(cca,x) \
(MIPS_XKPHYS_START | ((uint64_t)(cca) << 59) | (x))
#define MIPS3_PG_IOPAGE(cca) \
(MIPS3_PG_G | MIPS3_PG_V | MIPS3_PG_D | MIPS3_CCA_TO_PG(cca))
#define MIPS3_CCA_TO_PG(cca) ((cca) << 3)
#define MIPS3_PG_TO_CCA(cca) (((cca) >> 3) & 7)
u_int cca = PMAP_CCA_FOR_PA(pa);
cca = mips_options.mips3_cca_devmem;
pte = MIPS3_PG_IOPAGE(cca) & ~MIPS3_PG_G;
uint32_t cca;
cca = (opts->mips_cpu_flags & CPU_MIPS_CACHED_CCA_MASK) >>
opts->mips3_pg_cached = MIPS3_CCA_TO_PG(cca);
opts->mips3_xkphys_cached = MIPS_PHYS_TO_XKPHYS(cca, 0);
vaddr_t cca;
cca = (SH3_CCA | way << sh_cache_way_shift | va);
_reg_bclr_4(cca, bits);
volatile uint32_t *cca;
cca = (volatile uint32_t *)
cca[ 0] &= ~bits;
cca[ 4] &= ~bits;
cca[ 8] &= ~bits;
cca[12] &= ~bits;
cca[16] &= ~bits;
cca[20] &= ~bits;
cca[24] &= ~bits;
cca[28] &= ~bits;
vaddr_t cca;
cca = SH3_CCA | CCA_A | (va & sh_cache_entry_mask);
_reg_write_4(cca, va & CCA_TAGADDR_MASK);
vaddr_t cca;
cca = base | (va & mask);
_reg_bclr_4(cca, bits);
volatile uint32_t *cca = (volatile uint32_t *)
cca[ 0] &= ~bits;
cca[ 8] &= ~bits;
cca[16] &= ~bits;
cca[24] &= ~bits;
cca[32] &= ~bits;
cca[40] &= ~bits;
cca[48] &= ~bits;
cca[56] &= ~bits;
vaddr_t cca;
cca = base | (0 << way_shift) | va;
_reg_bclr_4(cca, bits);
cca = base | (1 << way_shift) | va;
_reg_bclr_4(cca, bits);
volatile uint32_t *cca;
cca = (volatile uint32_t *)(base | (0 << way_shift) | va);
cca[ 0] &= ~bits;
cca[ 8] &= ~bits;
cca[16] &= ~bits;
cca[24] &= ~bits;
cca[32] &= ~bits;
cca[40] &= ~bits;
cca[48] &= ~bits;
cca[56] &= ~bits;
cca = (volatile uint32_t *)(base | (1 << way_shift) | va);
cca[ 0] &= ~bits;
cca[ 8] &= ~bits;
cca[16] &= ~bits;
cca[24] &= ~bits;
cca[32] &= ~bits;
cca[40] &= ~bits;
cca[48] &= ~bits;
cca[56] &= ~bits;
vaddr_t va, va_end, cca;
cca = SH3_CCA | entry;
r = _reg_read_4(cca | (way << sh_cache_way_shift));
struct cca *cca_base; /* Physical base address of block */
extern struct cca *cca;
vp = (cca->cca_vecenab & (1 << xa->xa_nodenr));
mapaddr = (cca ? (int)cca : rpb.cca_addr);
cca = (void *)vax_map_physmem(mapaddr, vax_btoc(sizeof(struct cca)));
if (cca == 0)
cca = (void *)rpb.cca_addr;
for (i = ncpus = 0; i < cca->cca_maxcpu; i++)
if (cca->cca_console & (1 << i))
struct cca *cca;
uint16_t cca;
cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff;
DPRINTFN(2, ("RSSI=%ddBm false CCA=%d\n", dbm, cca));
else if (cca > 512)
else if (cca < 100)