cardbus_conf_read
value = cardbus_conf_read(cc, cf, tag, offset + PCI_PMCSR);
pcs->reg[off] = cardbus_conf_read(cc, cf, tag, (off * 4));
val = cardbus_conf_read(cc, cf, tag, (off * 4));
u_int32_t e = (*cf->cardbus_conf_read)(cc, tag, i);
exrom = cardbus_conf_read(cc, cf, tag, reg);
command = cardbus_conf_read(cc, cf, tag,
exrom = cardbus_conf_read(cc, cf, tag, reg);
command = cardbus_conf_read(cc, cf, tag,
command = cardbus_conf_read(cc, cf, tag,
id = cardbus_conf_read(cc, cf, tag, PCI_ID_REG);
bhlc = cardbus_conf_read(cc, cf, tag, PCI_BHLC_REG);
id = cardbus_conf_read(cc, cf, tag, PCI_ID_REG);
class = cardbus_conf_read(cc, cf, tag, PCI_CLASS_REG);
cis_ptr = cardbus_conf_read(cc, cf, tag, CARDBUS_CIS_REG);
bhlc = cardbus_conf_read(cc, cf, tag, PCI_BHLC_REG);
icr = cardbus_conf_read(cc, cf, tag, PCI_INTERRUPT_REG);
bhlc = cardbus_conf_read(cc, cf, tag, PCI_BHLC_REG);
command = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG);
reg = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG);
ofs = PCI_CAPLIST_PTR(cardbus_conf_read(cc, cf, tag,
reg = cardbus_conf_read(cc, cf, tag, ofs);
value = cardbus_conf_read(cc, cf, tag, offset + PCI_PMCSR);
address = cardbus_conf_read(cc, cf, tag, reg);
mask = cardbus_conf_read(cc, cf, tag, reg);
address = cardbus_conf_read(cc, cf, tag, reg);
mask = cardbus_conf_read(cc, cf, tag, reg);
#define Cardbus_conf_read(ct, tag, offs) (*(ct)->ct_cf->cardbus_conf_read)((ct)->ct_cc, (tag), (offs))
#define cardbus_conf_read(cc, cf, tag, offs) ((cf)->cardbus_conf_read)((cc), (tag), (offs))
pcireg_t (*cardbus_conf_read)(cardbus_chipset_tag_t,