bus_info
pte |= (bus_info[bustype].type << PG_MOD_SHIFT);
pa &= bus_info[bustype].mask;
pa |= bus_info[bustype].base;
pa |= bus_info[bustype].type;
} bus_info[BUS__NTYPES] = {
pa &= bus_info[bustype].mask;
pa |= bus_info[bustype].base;
pa &= bus_info[bustype].mask;
pa |= bus_info[bustype].base;
} bus_info[BUS__NTYPES] = {
pa &= bus_info[bustype].mask;
pa |= bus_info[bustype].base;
struct bus_info_gpio *bus_info;
bus_info = kmem_zalloc(sizeof(*bus_info), KM_SLEEP);
error = fdtbus_get_reg(bus_phandle, 0, &bus_info->value, NULL);
kmem_free(bus_info, sizeof(*bus_info));
return bus_info;
struct bus_info_gpio * const bus_info = bus->bus_data;
iicmux_gpio_set_value(bus->mux, bus_info->value);
struct bus_info_pinctrl *bus_info;
bus_info = kmem_alloc(sizeof(*bus_info), KM_SLEEP);
error = fdtbus_get_reg(bus_phandle, 0, &bus_info->idx, NULL);
kmem_free(bus_info, sizeof(*bus_info));
return bus_info;
struct bus_info_pinctrl * const bus_info = bus->bus_data;
return fdtbus_pinctrl_set_config_index(phandle, bus_info->idx);
struct pcaiicmux_bus_info * const bus_info =
bus_info->enable_value =
bus_info->enable_value = 1 << addr;
return bus_info;
struct pcaiicmux_bus_info * const bus_info = bus->bus_data;
error = pcaiicmux_write(sc, bus_info->enable_value, flags);
struct bus_info *binfo;
binfo = (struct bus_info *)&csr[1];
struct bus_info businfo;
strlcpy(cap->bus_info, hw->get_businfo(sc->hw_softc),
sizeof(cap->bus_info));
u_int8_t bus_info[32];
printf("info.cap.bus_info=%s\n", cap.bus_info);
struct bus_info *bi;
bi = (struct bus_info *)p;