sys/arch/arm/amlogic/meson8b_clkc.c

51

#define HHI_GCLK_MPEG0 CBUS_REG(0x50)

sys/arch/arm/amlogic/meson8b_clkc.c

52

#define HHI_GCLK_MPEG1 CBUS_REG(0x51)

sys/arch/arm/amlogic/meson8b_clkc.c

53

#define HHI_GCLK_MPEG2 CBUS_REG(0x52)

sys/arch/arm/amlogic/meson8b_clkc.c

54

#define HHI_SYS_CPU_CLK_CNTL1 CBUS_REG(0x57)

sys/arch/arm/amlogic/meson8b_clkc.c

55

#define HHI_MPEG_CLK_CNTL CBUS_REG(0x5d)

sys/arch/arm/amlogic/meson8b_clkc.c

56

#define HHI_SYS_CPU_CLK_CNTL0 CBUS_REG(0x67)

sys/arch/arm/amlogic/meson8b_clkc.c

60

#define HHI_MPLL_CNTL CBUS_REG(0xa0)

sys/arch/arm/amlogic/meson8b_clkc.c

61

#define HHI_MPLL_CNTL2 CBUS_REG(0xa1)

sys/arch/arm/amlogic/meson8b_clkc.c

62

#define HHI_MPLL_CNTL5 CBUS_REG(0xa4)

sys/arch/arm/amlogic/meson8b_clkc.c

63

#define HHI_MPLL_CNTL6 CBUS_REG(0xa5)

sys/arch/arm/amlogic/meson8b_clkc.c

64

#define HHI_MPLL_CNTL7 CBUS_REG(0xa6)

sys/arch/arm/amlogic/meson8b_clkc.c

65

#define HHI_MPLL_CNTL8 CBUS_REG(0xa7)

sys/arch/arm/amlogic/meson8b_clkc.c

66

#define HHI_MPLL_CNTL9 CBUS_REG(0xa8)

sys/arch/arm/amlogic/meson8b_clkc.c

67

#define HHI_SYS_PLL_CNTL CBUS_REG(0xc0)

sys/arch/arm/amlogic/meson8b_pinctrl.c

168

.reg = CBUS_REG((_gpiobase) + 0), \

sys/arch/arm/amlogic/meson8b_pinctrl.c

173

.reg = CBUS_REG((_gpiobase) + 1), \

sys/arch/arm/amlogic/meson8b_pinctrl.c

178

.reg = CBUS_REG((_gpiobase) + 2), \

sys/arch/arm/amlogic/meson8b_pinctrl.c

183

.reg = CBUS_REG(_pullbase), \

sys/arch/arm/amlogic/meson8b_pinctrl.c

188

.reg = CBUS_REG(_pullbase), \

sys/arch/arm/amlogic/meson8b_pinctrl.c

38

#define REG0 CBUS_REG(0)

sys/arch/arm/amlogic/meson8b_pinctrl.c

39

#define REG1 CBUS_REG(1)

sys/arch/arm/amlogic/meson8b_pinctrl.c

40

#define REG2 CBUS_REG(2)

sys/arch/arm/amlogic/meson8b_pinctrl.c

41

#define REG3 CBUS_REG(3)

sys/arch/arm/amlogic/meson8b_pinctrl.c

42

#define REG4 CBUS_REG(4)

sys/arch/arm/amlogic/meson8b_pinctrl.c

43

#define REG5 CBUS_REG(5)

sys/arch/arm/amlogic/meson8b_pinctrl.c

44

#define REG6 CBUS_REG(6)

sys/arch/arm/amlogic/meson8b_pinctrl.c

45

#define REG7 CBUS_REG(7)

sys/arch/arm/amlogic/meson8b_pinctrl.c

46

#define REG8 CBUS_REG(8)

sys/arch/arm/amlogic/meson8b_pinctrl.c

47

#define REG9 CBUS_REG(9)

sys/arch/arm/amlogic/meson_usbphy.c

43

#define PREI_USB_PHY_CFG_REG CBUS_REG(0x00)

sys/arch/arm/amlogic/meson_usbphy.c

45

#define PREI_USB_PHY_CTRL_REG CBUS_REG(0x01)

sys/arch/arm/amlogic/meson_usbphy.c

51

#define PREI_USB_PHY_ADP_BC_REG CBUS_REG(0x03)

sys/arch/arm/amlogic/meson_wdt.c

44

#define WATCHDOG_TC_REG CBUS_REG(0)

sys/arch/arm/amlogic/meson_wdt.c

49

#define WATCHDOG_RESET_REG CBUS_REG(1)

sys/arch/arm/amlogic/mesong12_clkc.c

113

#define HHI_HIFI_PLL_CNTL0 CBUS_REG(0x36)

sys/arch/arm/amlogic/mesong12_clkc.c

114

#define HHI_HIFI_PLL_CNTL1 CBUS_REG(0x37)

sys/arch/arm/amlogic/mesong12_clkc.c

115

#define HHI_HIFI_PLL_CNTL2 CBUS_REG(0x38)

sys/arch/arm/amlogic/mesong12_clkc.c

116

#define HHI_HIFI_PLL_CNTL3 CBUS_REG(0x39)

sys/arch/arm/amlogic/mesong12_clkc.c

117

#define HHI_HIFI_PLL_CNTL4 CBUS_REG(0x3a)

sys/arch/arm/amlogic/mesong12_clkc.c

118

#define HHI_HIFI_PLL_CNTL5 CBUS_REG(0x3b)

sys/arch/arm/amlogic/mesong12_clkc.c

119

#define HHI_HIFI_PLL_CNTL6 CBUS_REG(0x3c)

sys/arch/arm/amlogic/mesong12_clkc.c

120

#define HHI_MEM_PD_REG0 CBUS_REG(0x40)

sys/arch/arm/amlogic/mesong12_clkc.c

121

#define HHI_GCLK_MPEG0 CBUS_REG(0x50)

sys/arch/arm/amlogic/mesong12_clkc.c

122

#define HHI_GCLK_MPEG1 CBUS_REG(0x51)

sys/arch/arm/amlogic/mesong12_clkc.c

123

#define HHI_GCLK_MPEG2 CBUS_REG(0x52)

sys/arch/arm/amlogic/mesong12_clkc.c

124

#define HHI_GCLK_OTHER CBUS_REG(0x54)

sys/arch/arm/amlogic/mesong12_clkc.c

125

#define HHI_GCLK_OTHER2 CBUS_REG(0x55)

sys/arch/arm/amlogic/mesong12_clkc.c

126

#define HHI_SYS_CPU_CLK_CNTL1 CBUS_REG(0x57)

sys/arch/arm/amlogic/mesong12_clkc.c

127

#define HHI_MPEG_CLK_CNTL CBUS_REG(0x5d)

sys/arch/arm/amlogic/mesong12_clkc.c

128

#define HHI_TS_CLK_CNTL CBUS_REG(0x64)

sys/arch/arm/amlogic/mesong12_clkc.c

129

#define HHI_SYS_CPU_CLK_CNTL0 CBUS_REG(0x67)

sys/arch/arm/amlogic/mesong12_clkc.c

130

#define HHI_VID_PLL_CLK_DIV CBUS_REG(0x68)

sys/arch/arm/amlogic/mesong12_clkc.c

131

#define HHI_SYS_CPUB_CLK_CNTL1 CBUS_REG(0x80)

sys/arch/arm/amlogic/mesong12_clkc.c

132

#define HHI_SYS_CPUB_CLK_CNTL CBUS_REG(0x82)

sys/arch/arm/amlogic/mesong12_clkc.c

133

#define HHI_NAND_CLK_CNTL CBUS_REG(0x97)

sys/arch/arm/amlogic/mesong12_clkc.c

134

#define HHI_SD_EMMC_CLK_CNTL CBUS_REG(0x99)

sys/arch/arm/amlogic/mesong12_clkc.c

135

#define HHI_MPLL_CNTL0 CBUS_REG(0x9e)

sys/arch/arm/amlogic/mesong12_clkc.c

136

#define HHI_MPLL_CNTL1 CBUS_REG(0x9f)

sys/arch/arm/amlogic/mesong12_clkc.c

1365

CLK_WRITE(sc, reg_cntl0 + CBUS_REG(1), 0x00000000);

sys/arch/arm/amlogic/mesong12_clkc.c

1366

CLK_WRITE(sc, reg_cntl0 + CBUS_REG(2), 0x00000000);

sys/arch/arm/amlogic/mesong12_clkc.c

1367

CLK_WRITE(sc, reg_cntl0 + CBUS_REG(3), 0x48681c00);

sys/arch/arm/amlogic/mesong12_clkc.c

1368

CLK_WRITE(sc, reg_cntl0 + CBUS_REG(4), 0x88770290);

sys/arch/arm/amlogic/mesong12_clkc.c

1369

CLK_WRITE(sc, reg_cntl0 + CBUS_REG(5), 0x39272000);

sys/arch/arm/amlogic/mesong12_clkc.c

137

#define HHI_MPLL_CNTL2 CBUS_REG(0xa0)

sys/arch/arm/amlogic/mesong12_clkc.c

138

#define HHI_MPLL_CNTL3 CBUS_REG(0xa1)

sys/arch/arm/amlogic/mesong12_clkc.c

139

#define HHI_MPLL_CNTL4 CBUS_REG(0xa2)

sys/arch/arm/amlogic/mesong12_clkc.c

140

#define HHI_MPLL_CNTL5 CBUS_REG(0xa3)

sys/arch/arm/amlogic/mesong12_clkc.c

141

#define HHI_MPLL_CNTL6 CBUS_REG(0xa4)

sys/arch/arm/amlogic/mesong12_clkc.c

142

#define HHI_MPLL_CNTL7 CBUS_REG(0xa5)

sys/arch/arm/amlogic/mesong12_clkc.c

143

#define HHI_MPLL_CNTL8 CBUS_REG(0xa6)

sys/arch/arm/amlogic/mesong12_clkc.c

144

#define HHI_FIX_PLL_CNTL0 CBUS_REG(0xa8)

sys/arch/arm/amlogic/mesong12_clkc.c

145

#define HHI_FIX_PLL_CNTL1 CBUS_REG(0xa9)

sys/arch/arm/amlogic/mesong12_clkc.c

146

#define HHI_FIX_PLL_CNTL2 CBUS_REG(0xaa)

sys/arch/arm/amlogic/mesong12_clkc.c

147

#define HHI_FIX_PLL_CNTL3 CBUS_REG(0xab)

sys/arch/arm/amlogic/mesong12_clkc.c

148

#define HHI_SYS_PLL_CNTL0 CBUS_REG(0xbd)

sys/arch/arm/amlogic/mesong12_clkc.c

149

#define HHI_SYS_PLL_CNTL1 CBUS_REG(0xbe)

sys/arch/arm/amlogic/mesong12_clkc.c

150

#define HHI_SYS_PLL_CNTL2 CBUS_REG(0xbf)

sys/arch/arm/amlogic/mesong12_clkc.c

151

#define HHI_SYS_PLL_CNTL3 CBUS_REG(0xc0)

sys/arch/arm/amlogic/mesong12_clkc.c

152

#define HHI_SYS_PLL_CNTL4 CBUS_REG(0xc1)

sys/arch/arm/amlogic/mesong12_clkc.c

153

#define HHI_SYS_PLL_CNTL5 CBUS_REG(0xc2)

sys/arch/arm/amlogic/mesong12_clkc.c

154

#define HHI_SYS_PLL_CNTL6 CBUS_REG(0xc3)

sys/arch/arm/amlogic/mesong12_clkc.c

155

#define HHI_HDMI_PLL_CNTL0 CBUS_REG(0xc8)

sys/arch/arm/amlogic/mesong12_clkc.c

156

#define HHI_HDMI_PLL_CNTL1 CBUS_REG(0xc9)

sys/arch/arm/amlogic/mesong12_clkc.c

157

#define HHI_SYS1_PLL_CNTL0 CBUS_REG(0xe0)

sys/arch/arm/amlogic/mesong12_clkc.c

158

#define HHI_SYS1_PLL_CNTL1 CBUS_REG(0xe1)

sys/arch/arm/amlogic/mesong12_clkc.c

159

#define HHI_SYS1_PLL_CNTL2 CBUS_REG(0xe2)

sys/arch/arm/amlogic/mesong12_clkc.c

160

#define HHI_SYS1_PLL_CNTL3 CBUS_REG(0xe3)

sys/arch/arm/amlogic/mesong12_clkc.c

161

#define HHI_SYS1_PLL_CNTL4 CBUS_REG(0xe4)

sys/arch/arm/amlogic/mesong12_clkc.c

162

#define HHI_SYS1_PLL_CNTL5 CBUS_REG(0xe5)

sys/arch/arm/amlogic/mesong12_clkc.c

163

#define HHI_SYS1_PLL_CNTL6 CBUS_REG(0xe6)

sys/arch/arm/amlogic/mesong12_clkc.c

44

#define HHI_GP0_PLL_CNTL0 CBUS_REG(0x10)

sys/arch/arm/amlogic/mesong12_clkc.c

45

#define HHI_GP0_PLL_CNTL1 CBUS_REG(0x11)

sys/arch/arm/amlogic/mesong12_clkc.c

46

#define HHI_GP0_PLL_CNTL2 CBUS_REG(0x12)

sys/arch/arm/amlogic/mesong12_clkc.c

47

#define HHI_GP0_PLL_CNTL3 CBUS_REG(0x13)

sys/arch/arm/amlogic/mesong12_clkc.c

48

#define HHI_GP0_PLL_CNTL4 CBUS_REG(0x14)

sys/arch/arm/amlogic/mesong12_clkc.c

49

#define HHI_GP0_PLL_CNTL5 CBUS_REG(0x15)

sys/arch/arm/amlogic/mesong12_clkc.c

50

#define HHI_GP0_PLL_CNTL6 CBUS_REG(0x16)

sys/arch/arm/amlogic/mesong12_clkc.c

51

#define HHI_GP1_PLL_CNTL0 CBUS_REG(0x18)

sys/arch/arm/amlogic/mesong12_clkc.c

52

#define HHI_GP1_PLL_CNTL1 CBUS_REG(0x19)

sys/arch/arm/amlogic/mesong12_clkc.c

53

#define HHI_PCIE_PLL_CNTL0 CBUS_REG(0x26)

sys/arch/arm/amlogic/mesong12_clkc.c

63

#define HHI_PCIE_PLL_CNTL1 CBUS_REG(0x27)

sys/arch/arm/amlogic/mesong12_clkc.c

66

#define HHI_PCIE_PLL_CNTL2 CBUS_REG(0x28)

sys/arch/arm/amlogic/mesong12_clkc.c

73

#define HHI_PCIE_PLL_CNTL3 CBUS_REG(0x29)

sys/arch/arm/amlogic/mesong12_clkc.c

83

#define HHI_PCIE_PLL_CNTL4 CBUS_REG(0x2a)

sys/arch/arm/amlogic/mesong12_clkc.c

97

#define HHI_PCIE_PLL_CNTL5 CBUS_REG(0x2b)

sys/arch/arm/amlogic/mesong12a_pinctrl.c

161

.reg = CBUS_REG((_off) * 3 + 0), \

sys/arch/arm/amlogic/mesong12a_pinctrl.c

166

.reg = CBUS_REG((_off) * 3 + 1), \

sys/arch/arm/amlogic/mesong12a_pinctrl.c

171

.reg = CBUS_REG((_off) * 3 + 2), \

sys/arch/arm/amlogic/mesong12a_pinctrl.c

176

.reg = CBUS_REG(_off), \

sys/arch/arm/amlogic/mesong12a_pinctrl.c

181

.reg = CBUS_REG(_off), \

sys/arch/arm/amlogic/mesong12a_pinctrl.c

291

.reg = CBUS_REG(_off), \

sys/arch/arm/amlogic/mesong12a_pinctrl.c

296

.reg = CBUS_REG((_off) + 4), \

sys/arch/arm/amlogic/mesong12a_pinctrl.c

301

.reg = CBUS_REG((_off) + 1), \

sys/arch/arm/amlogic/mesong12a_pinctrl.c

306

.reg = CBUS_REG((_off) + 3), \

sys/arch/arm/amlogic/mesong12a_pinctrl.c

311

.reg = CBUS_REG((_off) + 2), \

sys/arch/arm/amlogic/mesong12a_pinctrl.c

338

{ .name = _name, .reg = CBUS_REG(_reg), .bit = (_func), \

sys/arch/arm/amlogic/mesong12a_pinctrl.c

594

{ .name = _name, .reg = CBUS_REG((_bit) / 8), .bit = (_func), \

sys/arch/arm/amlogic/mesongx_wdt.c

44

#define WATCHDOG_CNTL CBUS_REG(0)

sys/arch/arm/amlogic/mesongx_wdt.c

50

#define WATCHDOG_CNTL1 CBUS_REG(1)

sys/arch/arm/amlogic/mesongx_wdt.c

51

#define WATCHDOG_TCNT CBUS_REG(2)

sys/arch/arm/amlogic/mesongx_wdt.c

52

#define WATCHDOG_RESET CBUS_REG(3)

sys/arch/arm/amlogic/mesongxbb_clkc.c

45

#define HHI_GCLK_MPEG0 CBUS_REG(0x50)

sys/arch/arm/amlogic/mesongxbb_clkc.c

46

#define HHI_GCLK_MPEG1 CBUS_REG(0x51)

sys/arch/arm/amlogic/mesongxbb_clkc.c

47

#define HHI_GCLK_MPEG2 CBUS_REG(0x52)

sys/arch/arm/amlogic/mesongxbb_clkc.c

48

#define HHI_GCLK_OTHER CBUS_REG(0x54)

sys/arch/arm/amlogic/mesongxbb_clkc.c

49

#define HHI_SYS_CPU_CLK_CNTL1 CBUS_REG(0x57)

sys/arch/arm/amlogic/mesongxbb_clkc.c

50

#define HHI_MPEG_CLK_CNTL CBUS_REG(0x5d)

sys/arch/arm/amlogic/mesongxbb_clkc.c

51

#define HHI_NAND_CLK_CNTL CBUS_REG(0x97)

sys/arch/arm/amlogic/mesongxbb_clkc.c

52

#define HHI_SD_EMMC_CLK_CNTL CBUS_REG(0x99)

sys/arch/arm/amlogic/mesongxbb_clkc.c

53

#define HHI_MPLL_CNTL CBUS_REG(0xa0)

sys/arch/arm/amlogic/mesongxbb_clkc.c

54

#define HHI_MPLL_CNTL2 CBUS_REG(0xa1)

sys/arch/arm/amlogic/mesongxbb_clkc.c

55

#define HHI_MPLL_CNTL5 CBUS_REG(0xa4)

sys/arch/arm/amlogic/mesongxbb_clkc.c

56

#define HHI_MPLL_CNTL6 CBUS_REG(0xa5)

sys/arch/arm/amlogic/mesongxbb_clkc.c

57

#define HHI_MPLL_CNTL7 CBUS_REG(0xa6)

sys/arch/arm/amlogic/mesongxbb_clkc.c

58

#define HHI_MPLL_CNTL8 CBUS_REG(0xa7)

sys/arch/arm/amlogic/mesongxbb_clkc.c

59

#define HHI_MPLL_CNTL9 CBUS_REG(0xa8)

sys/arch/arm/amlogic/mesongxbb_clkc.c

60

#define HHI_SYS_PLL_CNTL CBUS_REG(0xc0)

sys/arch/arm/amlogic/mesongxbb_pinctrl.c

207

.reg = CBUS_REG((_off) * 3 + 0), \

sys/arch/arm/amlogic/mesongxbb_pinctrl.c

212

.reg = CBUS_REG((_off) * 3 + 1), \

sys/arch/arm/amlogic/mesongxbb_pinctrl.c

217

.reg = CBUS_REG((_off) * 3 + 2), \

sys/arch/arm/amlogic/mesongxbb_pinctrl.c

222

.reg = CBUS_REG(_off), \

sys/arch/arm/amlogic/mesongxbb_pinctrl.c

227

.reg = CBUS_REG(_off), \

sys/arch/arm/amlogic/mesongxbb_pinctrl.c

38

#define REG0 CBUS_REG(0)

sys/arch/arm/amlogic/mesongxbb_pinctrl.c

39

#define REG1 CBUS_REG(1)

sys/arch/arm/amlogic/mesongxbb_pinctrl.c

40

#define REG2 CBUS_REG(2)

sys/arch/arm/amlogic/mesongxbb_pinctrl.c

41

#define REG3 CBUS_REG(3)

sys/arch/arm/amlogic/mesongxbb_pinctrl.c

42

#define REG4 CBUS_REG(4)

sys/arch/arm/amlogic/mesongxbb_pinctrl.c

43

#define REG5 CBUS_REG(5)

sys/arch/arm/amlogic/mesongxbb_pinctrl.c

44

#define REG6 CBUS_REG(6)

sys/arch/arm/amlogic/mesongxbb_pinctrl.c

45

#define REG7 CBUS_REG(7)

sys/arch/arm/amlogic/mesongxbb_pinctrl.c

46

#define REG8 CBUS_REG(8)

sys/arch/arm/amlogic/mesongxbb_pinctrl.c

47

#define REG9 CBUS_REG(9)

sys/arch/arm/amlogic/mesongxl_pinctrl.c

183

.reg = CBUS_REG((_off) * 3 + 0), \

sys/arch/arm/amlogic/mesongxl_pinctrl.c

188

.reg = CBUS_REG((_off) * 3 + 1), \

sys/arch/arm/amlogic/mesongxl_pinctrl.c

193

.reg = CBUS_REG((_off) * 3 + 2), \

sys/arch/arm/amlogic/mesongxl_pinctrl.c

198

.reg = CBUS_REG(_off), \

sys/arch/arm/amlogic/mesongxl_pinctrl.c

203

.reg = CBUS_REG(_off), \

sys/arch/arm/amlogic/mesongxl_pinctrl.c

38

#define REG0 CBUS_REG(0)

sys/arch/arm/amlogic/mesongxl_pinctrl.c

39

#define REG1 CBUS_REG(1)

sys/arch/arm/amlogic/mesongxl_pinctrl.c

40

#define REG2 CBUS_REG(2)

sys/arch/arm/amlogic/mesongxl_pinctrl.c

41

#define REG3 CBUS_REG(3)

sys/arch/arm/amlogic/mesongxl_pinctrl.c

42

#define REG4 CBUS_REG(4)

sys/arch/arm/amlogic/mesongxl_pinctrl.c

43

#define REG5 CBUS_REG(5)

sys/arch/arm/amlogic/mesongxl_pinctrl.c

44

#define REG6 CBUS_REG(6)

sys/arch/arm/amlogic/mesongxl_pinctrl.c

45

#define REG7 CBUS_REG(7)

sys/arch/arm/amlogic/mesongxl_pinctrl.c

46

#define REG8 CBUS_REG(8)

sys/arch/arm/amlogic/mesongxl_pinctrl.c

47

#define REG9 CBUS_REG(9)