bcmpax_write_4
bcmpax_write_4(sc, PCIE_IARR_1_LOWER, iwin1_start | uimin(megs, 128));
bcmpax_write_4(sc, PCIE_FUNC0_IMAP1, iwin1_start | 1);
bcmpax_write_4(sc, PCIE_FUNC0_IMAP1, iwin1_start | uimin(megs, 128));
bcmpax_write_4(sc, PCIE_IARR_1_LOWER, iwin1_start | 1);
bcmpax_write_4(sc, PCIE_IARR_2_LOWER, iwin2_start | uimin(megs - 128, 128));
bcmpax_write_4(sc, PCIE_FUNC0_IMAP2, iwin2_start | 1);
bcmpax_write_4(sc, PCIE_FUNC0_IMAP2, iwin2_start | uimin(megs - 128, 128));
bcmpax_write_4(sc, PCIE_IARR_2_LOWER, iwin2_start | 1);
bcmpax_write_4(sc, PCIE_IARR_1_LOWER, 0);
bcmpax_write_4(sc, PCIE_FUNC0_IMAP1, 0);
bcmpax_write_4(sc, PCIE_IARR_2_LOWER, 0);
bcmpax_write_4(sc, PCIE_FUNC0_IMAP2, 0);
bcmpax_write_4(sc, PCIE_CLK_CONTROL, 3);
bcmpax_write_4(sc, PCIE_CLK_CONTROL, 1);
bcmpax_write_4(sc, PCIE_SYS_RC_INTX_EN, 0x0f);
bcmpax_write_4(sc, PCIE_OARR_0, base);
bcmpax_write_4(sc, PCIE_OMAP_0_LOWER, base | 1);
bcmpax_write_4(sc, PCIE_OARR_1, base1);
bcmpax_write_4(sc, PCIE_OMAP_1_LOWER, base1 | 1);
bcmpax_write_4(sc, PCIE_CFG_IND_ADDR,
bcmpax_write_4(sc, PCIE_CFG_ADDR, tag);
bcmpax_write_4(sc, data_reg, val);