axe_cmd
axe_cmd(sc, AXE_772B_CMD_WRITE_TXCSUM, csum2, csum1, NULL);
axe_cmd(sc, AXE_772B_CMD_WRITE_RXCSUM, csum2, csum1, NULL);
axe_cmd(sc, AXE_172_CMD_WRITE_NODEID, 0, 0, un->un_eaddr);
axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->axe_ipgs[0], NULL);
axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->axe_ipgs[1], NULL);
axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->axe_ipgs[2], NULL);
axe_cmd(sc, AXE_178_CMD_WRITE_NODEID, 0, 0, un->un_eaddr);
axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->axe_ipgs[2],
axe_cmd(sc, AXE_772B_CMD_RXCTL_WRITE_CFG,
axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
err = axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, &data);
axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
err = axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, &aval);
axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL);
if (axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode)) {
axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, mchash);
axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
if (axe_cmd(sc, cmd, 0, 0, un->un_eaddr)) {
axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, (x), NULL); \
axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL);
if (axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom) != 0)
axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL);
axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL);
axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL);
axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL);
axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0,
axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL);
axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL);
axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, AXE_SW_PHY_SELECT_EXT,
axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0,
axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, AXE_SW_PHY_SELECT_SS_ENB |
axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_IPPD |
axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_IPRL, NULL);
axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRTE, NULL);
axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL);
axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_IPRL, NULL);
axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
if (axe_cmd(sc, AXE_CMD_SROM_READ, 0, AXE_EEPROM_772B_PHY_PWRCFG,
if (axe_cmd(sc, AXE_CMD_SROM_READ, 0,
axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
if (axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, &sc->axe_phyaddrs)) {
if (axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, sc->axe_ipgs)) {