sys/arch/arm/nvidia/tegra210_car.c

590

CAR_PLLU_OUTA_REG, CAR_PLLU_OUTA_OUT1_RATIO),

sys/arch/arm/nvidia/tegra210_car.c

592

CAR_PLLU_OUTA_REG, CAR_PLLU_OUTA_OUT2_RATIO),

sys/arch/arm/nvidia/tegra210_car.c

613

CAR_PLLU_OUTA_REG, CAR_PLLU_OUTA_OUT1_CLKEN),

sys/arch/arm/nvidia/tegra210_car.c

615

CAR_PLLU_OUTA_REG, CAR_PLLU_OUTA_OUT2_CLKEN),

sys/arch/arm/nvidia/tegra210_car.c

948

tegra_reg_set_clear(bst, bsh, CAR_PLLU_OUTA_REG, 0, CAR_PLLU_OUTA_OUT1_RSTN);

sys/arch/arm/nvidia/tegra210_car.c

949

tegra_reg_set_clear(bst, bsh, CAR_PLLU_OUTA_REG, 0, CAR_PLLU_OUTA_OUT2_RSTN);

sys/arch/arm/nvidia/tegra210_car.c

964

tegra_reg_set_clear(bst, bsh, CAR_PLLU_OUTA_REG, CAR_PLLU_OUTA_OUT1_RSTN, 0);

sys/arch/arm/nvidia/tegra210_car.c

965

tegra_reg_set_clear(bst, bsh, CAR_PLLU_OUTA_REG, CAR_PLLU_OUTA_OUT2_RSTN, 0);