Symbol: CAR_PLLE_BASE_REG
sys/arch/arm/nvidia/tegra124_car.c
444
CLK_PLL("pll_e", "clk_m", CAR_PLLE_BASE_REG,
sys/arch/arm/nvidia/tegra124_car.c
889
tegra_reg_set_clear(bst, bsh, CAR_PLLE_BASE_REG,
sys/arch/arm/nvidia/tegra210_car.c
1015
tegra_reg_set_clear(bst, bsh, CAR_PLLE_BASE_REG,
sys/arch/arm/nvidia/tegra210_car.c
1025
tegra_reg_set_clear(bst, bsh, CAR_PLLE_BASE_REG, CAR_PLLE_BASE_ENABLE, 0);
sys/arch/arm/nvidia/tegra210_car.c
1166
} else if (tpll->base_reg == CAR_PLLE_BASE_REG) {
sys/arch/arm/nvidia/tegra210_car.c
473
CLK_PLL("PLL_E", "CLK_M", CAR_PLLE_BASE_REG,