Symbol: CAR_PLLD2_BASE_REG
sys/arch/arm/nvidia/tegra124_car.c
1106
} else if (tpll->base_reg == CAR_PLLD2_BASE_REG) {
sys/arch/arm/nvidia/tegra124_car.c
1155
tegra_reg_set_clear(bst, bsh, CAR_PLLD2_BASE_REG,
sys/arch/arm/nvidia/tegra124_car.c
1164
tegra_reg_set_clear(bst, bsh, CAR_PLLD2_BASE_REG,
sys/arch/arm/nvidia/tegra124_car.c
1170
v = bus_space_read_4(bst, bsh, CAR_PLLD2_BASE_REG);
sys/arch/arm/nvidia/tegra124_car.c
448
CLK_PLL("pll_d2", "clk_m", CAR_PLLD2_BASE_REG,
sys/arch/arm/nvidia/tegra210_car.c
1234
} else if (tpll->base_reg == CAR_PLLD2_BASE_REG) {
sys/arch/arm/nvidia/tegra210_car.c
477
CLK_PLL("PLL_D2", "CLK_M", CAR_PLLD2_BASE_REG,