sys/arch/arm/nvidia/tegra124_car.c

471

CLK_MUX("mux_sdmmc1", CAR_CLKSRC_SDMMC1_REG, CAR_CLKSRC_SDMMC_SRC,

sys/arch/arm/nvidia/tegra124_car.c

473

CLK_MUX("mux_sdmmc2", CAR_CLKSRC_SDMMC2_REG, CAR_CLKSRC_SDMMC_SRC,

sys/arch/arm/nvidia/tegra124_car.c

475

CLK_MUX("mux_sdmmc3", CAR_CLKSRC_SDMMC3_REG, CAR_CLKSRC_SDMMC_SRC,

sys/arch/arm/nvidia/tegra124_car.c

477

CLK_MUX("mux_sdmmc4", CAR_CLKSRC_SDMMC4_REG, CAR_CLKSRC_SDMMC_SRC,

sys/arch/arm/nvidia/tegra210_car.c

1366

switch (__SHIFTOUT(v, CAR_CLKSRC_SDMMC_SRC)) {

sys/arch/arm/nvidia/tegra210_car.c

494

CLK_MUX("MUX_SDMMC1", CAR_CLKSRC_SDMMC1_REG, CAR_CLKSRC_SDMMC_SRC,

sys/arch/arm/nvidia/tegra210_car.c

496

CLK_MUX("MUX_SDMMC2", CAR_CLKSRC_SDMMC2_REG, CAR_CLKSRC_SDMMC_SRC,

sys/arch/arm/nvidia/tegra210_car.c

498

CLK_MUX("MUX_SDMMC3", CAR_CLKSRC_SDMMC3_REG, CAR_CLKSRC_SDMMC_SRC,

sys/arch/arm/nvidia/tegra210_car.c

500

CLK_MUX("MUX_SDMMC4", CAR_CLKSRC_SDMMC4_REG, CAR_CLKSRC_SDMMC_SRC,