Symbol: at91usart_writereg
sys/arch/arm/at91/at91usart.c
1063
at91usart_writereg(sc, US_CR, US_CR_RSTSTA | US_CR_STTTO);
sys/arch/arm/at91/at91usart.c
1066
at91usart_writereg(sc, US_CR, US_CR_STTTO);
sys/arch/arm/at91/at91usart.c
1087
at91usart_writereg(sc, US_IER, sc->sc_ier); // re-enable interrupts
sys/arch/arm/at91/at91usart.c
1110
at91usart_writereg(sc, US_IDR, -1);
sys/arch/arm/at91/at91usart.c
268
at91usart_writereg(sc, US_IDR, -1);
sys/arch/arm/at91/at91usart.c
269
at91usart_writereg(sc, US_RTOR, 12); // 12-bit timeout
sys/arch/arm/at91/at91usart.c
270
at91usart_writereg(sc, US_PDC + PDC_PTCR, PDC_PTCR_TXTDIS | PDC_PTCR_RXTDIS);
sys/arch/arm/at91/at91usart.c
406
at91usart_writereg(sc, US_PDC + PDC_PTCR, PDC_PTCR_TXTEN);
sys/arch/arm/at91/at91usart.c
415
at91usart_writereg(sc, US_PDC + PDC_PTCR, PDC_PTCR_TXTDIS);
sys/arch/arm/at91/at91usart.c
515
at91usart_writereg(sc, US_IER, sc->sc_ier);
sys/arch/arm/at91/at91usart.c
527
at91usart_writereg(sc, US_CR, onoff ? US_CR_STTBRK : US_CR_STPBRK);
sys/arch/arm/at91/at91usart.c
538
at91usart_writereg(sc, US_PDC + PDC_PTCR, PDC_PTCR_TXTDIS | PDC_PTCR_RXTDIS);
sys/arch/arm/at91/at91usart.c
539
at91usart_writereg(sc, US_PDC + PDC_TNCR, 0);
sys/arch/arm/at91/at91usart.c
540
at91usart_writereg(sc, US_PDC + PDC_TCR, 0);
sys/arch/arm/at91/at91usart.c
541
at91usart_writereg(sc, US_PDC + PDC_RNCR, 0);
sys/arch/arm/at91/at91usart.c
542
at91usart_writereg(sc, US_PDC + PDC_RCR, 0);
sys/arch/arm/at91/at91usart.c
545
at91usart_writereg(sc, US_IDR, -1);
sys/arch/arm/at91/at91usart.c
619
at91usart_writereg(sc, US_CR, US_CR_RSTSTA | US_CR_STTTO);
sys/arch/arm/at91/at91usart.c
623
at91usart_writereg(sc, US_IER, sc->sc_ier);
sys/arch/arm/at91/at91usart.c
626
at91usart_writereg(sc, US_PDC + PDC_PTCR, PDC_PTCR_RXTEN);
sys/arch/arm/at91/at91usart.c
863
at91usart_writereg(sc, US_MR, US_MR_CHRL_8 | US_MR_PAR_NONE | US_MR_NBSTOP_1);
sys/arch/arm/at91/at91usart.c
864
at91usart_writereg(sc, US_BRGR, sc->sc_brgr);
sys/arch/arm/at91/at91usart.c
865
at91usart_writereg(sc, US_CR, US_CR_TXEN | US_CR_RXEN); // @@@ just in case
sys/arch/arm/at91/at91usartreg.h
154
at91usart_writereg(sc, US_PDC + PDC_PTCR, \
sys/arch/arm/at91/at91usartreg.h
156
at91usart_writereg(sc, US_PDC + PDC_RNCR, 0); \
sys/arch/arm/at91/at91usartreg.h
157
at91usart_writereg(sc, US_PDC + PDC_RCR, 0); \
sys/arch/arm/at91/at91usartreg.h
158
at91usart_writereg(sc, US_PDC + PDC_TNCR, 0); \
sys/arch/arm/at91/at91usartreg.h
159
at91usart_writereg(sc, US_PDC + PDC_TCR, 0); \
sys/arch/arm/at91/at91usartreg.h
160
at91usart_writereg(sc, US_MR, US_MR_USCLKS_MCK | US_MR_CHRL_8 \
sys/arch/arm/at91/at91usartreg.h
162
at91usart_writereg(sc, US_BRGR, \
sys/arch/arm/at91/at91usartreg.h
164
at91usart_writereg(sc, US_CR, US_CR_RSTRX | US_CR_RSTTX); \
sys/arch/arm/at91/at91usartreg.h
165
at91usart_writereg(sc, US_CR, US_CR_RSTSTA | US_CR_RXEN | US_CR_TXEN \