sys/arch/arm/xscale/ixp425_qmgr.c

1009

aqm_reg_write(sc, IX_QMGR_Q_CONFIG_ADDR_GET(qId), qCfg);

sys/arch/arm/xscale/ixp425_qmgr.c

1042

aqm_reg_write(sc, off, v);

sys/arch/arm/xscale/ixp425_qmgr.c

1054

aqm_reg_write(sc, IX_QMGR_QUELOWSTAT0_OFFSET,

sys/arch/arm/xscale/ixp425_qmgr.c

1056

aqm_reg_write(sc, IX_QMGR_QUELOWSTAT1_OFFSET,

sys/arch/arm/xscale/ixp425_qmgr.c

1058

aqm_reg_write(sc, IX_QMGR_QUELOWSTAT2_OFFSET,

sys/arch/arm/xscale/ixp425_qmgr.c

1060

aqm_reg_write(sc, IX_QMGR_QUELOWSTAT3_OFFSET,

sys/arch/arm/xscale/ixp425_qmgr.c

1064

aqm_reg_write(sc, IX_QMGR_QUEUOSTAT0_OFFSET,

sys/arch/arm/xscale/ixp425_qmgr.c

1066

aqm_reg_write(sc, IX_QMGR_QUEUOSTAT1_OFFSET,

sys/arch/arm/xscale/ixp425_qmgr.c

1070

aqm_reg_write(sc, IX_QMGR_QUEUPPSTAT0_OFFSET,

sys/arch/arm/xscale/ixp425_qmgr.c

1074

aqm_reg_write(sc, IX_QMGR_QUEUPPSTAT1_OFFSET,

sys/arch/arm/xscale/ixp425_qmgr.c

1078

aqm_reg_write(sc, IX_QMGR_INT0SRCSELREG0_OFFSET,

sys/arch/arm/xscale/ixp425_qmgr.c

1080

aqm_reg_write(sc, IX_QMGR_INT0SRCSELREG1_OFFSET,

sys/arch/arm/xscale/ixp425_qmgr.c

1082

aqm_reg_write(sc, IX_QMGR_INT0SRCSELREG2_OFFSET,

sys/arch/arm/xscale/ixp425_qmgr.c

1084

aqm_reg_write(sc, IX_QMGR_INT0SRCSELREG3_OFFSET,

sys/arch/arm/xscale/ixp425_qmgr.c

1088

aqm_reg_write(sc, IX_QMGR_QUEIEREG0_OFFSET,

sys/arch/arm/xscale/ixp425_qmgr.c

1090

aqm_reg_write(sc, IX_QMGR_QUEIEREG1_OFFSET,

sys/arch/arm/xscale/ixp425_qmgr.c

1094

aqm_reg_write(sc, IX_QMGR_QINTREG0_OFFSET, IX_QMGR_QINTREG_RESET_VALUE);

sys/arch/arm/xscale/ixp425_qmgr.c

1095

aqm_reg_write(sc, IX_QMGR_QINTREG1_OFFSET, IX_QMGR_QINTREG_RESET_VALUE);

sys/arch/arm/xscale/ixp425_qmgr.c

1099

aqm_reg_write(sc, sc->qinfo[i].qConfigRegAddr,

sys/arch/arm/xscale/ixp425_qmgr.c

1105

aqm_reg_write(sc, i, 0);

sys/arch/arm/xscale/ixp425_qmgr.c

408

aqm_reg_write(sc, qi->qAccRegAddr, entry);

sys/arch/arm/xscale/ixp425_qmgr.c

430

aqm_reg_write(sc, qi->qUOStatRegAddr,

sys/arch/arm/xscale/ixp425_qmgr.c

488

aqm_reg_write(sc, qi->qUOStatRegAddr,

sys/arch/arm/xscale/ixp425_qmgr.c

527

aqm_reg_write(sc, qi->qUOStatRegAddr,

sys/arch/arm/xscale/ixp425_qmgr.c

761

aqm_reg_write(sc, IX_QMGR_QINTREG0_OFFSET, intRegVal);

sys/arch/arm/xscale/ixp425_qmgr.c

918

aqm_reg_write(sc, reg, v | (1 << (qId % IX_QMGR_MIN_QUEUPP_QID)));

sys/arch/arm/xscale/ixp425_qmgr.c

935

aqm_reg_write(sc, reg, v &~ (1 << (qId % IX_QMGR_MIN_QUEUPP_QID)));