agten_write_dac
agten_write_dac(sc, IBM561_CMD, (tmp >> 8) & 0xff);
agten_write_dac(sc, IBM561_CMD, tmp & 0xff);
agten_write_dac(sc, reg, (val >> 2) & 0xff);
agten_write_dac(sc, reg, (val & 0x3) << 6);
agten_write_dac(sc, IBM561_CMD_CMAP, r);
agten_write_dac(sc, IBM561_CMD_CMAP, g);
agten_write_dac(sc, IBM561_CMD_CMAP, b);
agten_write_dac(sc, IBM561_CMD_CMAP, i);
agten_write_dac(sc, IBM561_CMD_CMAP, i);
agten_write_dac(sc, IBM561_CMD_CMAP, i);
agten_write_dac(sc, IBM561_CMD, CR3_SERIAL_CLK_CTRL | CR3_RGB);
agten_write_dac(sc, IBM561_CMD, CR1_MODE_4_1_BASIC | CR1_OVL_8BPP |
agten_write_dac(sc, IBM561_CMD, CR2_ENABLE_CLC | CR2_PLL_REF_SELECT |
agten_write_dac(sc, IBM561_CMD_FB_WAT, 0x0);
agten_write_dac(sc, IBM561_CMD, flag ? reg | CR2_ENABLE_RGB_OUTPUT :
agten_write_dac(sc, IBM561_CMD, x & 0xff);
agten_write_dac(sc, IBM561_CMD, (x >> 8) & 0xff);
agten_write_dac(sc, IBM561_CMD, y & 0xff);
agten_write_dac(sc, IBM561_CMD, (y >> 8) & 0xff);
agten_write_dac(sc, IBM561_CMD, cur->enable ?
agten_write_dac(sc, IBM561_CMD, cur->hot.x);
agten_write_dac(sc, IBM561_CMD, cur->hot.y);
agten_write_dac(sc, IBM561_CMD_CMAP, cur->cmap.red[i]);
agten_write_dac(sc, IBM561_CMD_CMAP,
agten_write_dac(sc, IBM561_CMD_CMAP, cur->cmap.blue[i]);
agten_write_dac(sc, IBM561_CMD, (tmp >> 8) & 0xff);
agten_write_dac(sc, IBM561_CMD, tmp & 0xff);
agten_write_dac(sc, IBM561_CMD, cur->enable ?
agten_write_dac(sc, IBM561_CMD, cur->hot.x);
agten_write_dac(sc, IBM561_CMD, cur->hot.y);
agten_write_dac(sc, IBM561_CMD_CMAP, cur->cmap.red[i]);
agten_write_dac(sc, IBM561_CMD_CMAP,
agten_write_dac(sc, IBM561_CMD_CMAP, cur->cmap.blue[i]);