lib/libc/arch/powerpc/gen/syncicache.c

47

#ifndef CACHELINESIZE

lib/libc/arch/powerpc/gen/syncicache.c

51

CACHELINESIZE,

lib/libc/arch/powerpc/gen/syncicache.c

52

CACHELINESIZE,

lib/libc/arch/powerpc/gen/syncicache.c

53

CACHELINESIZE,

lib/libc/arch/powerpc/gen/syncicache.c

54

CACHELINESIZE

lib/libc/arch/powerpc64/gen/syncicache.c

45

#ifndef CACHELINESIZE

lib/libc/arch/powerpc64/gen/syncicache.c

49

CACHELINESIZE,

lib/libc/arch/powerpc64/gen/syncicache.c

50

CACHELINESIZE,

lib/libc/arch/powerpc64/gen/syncicache.c

51

CACHELINESIZE,

lib/libc/arch/powerpc64/gen/syncicache.c

52

CACHELINESIZE

sys/arch/bebox/bebox/mainbus.c

146

pci_configure_bus(genppc_pct, pcires, 0, CACHELINESIZE);

sys/arch/cobalt/stand/boot/cache.c

46

#define round_line(x) (((x) + (CACHELINESIZE - 1)) & ~(CACHELINESIZE - 1))

sys/arch/cobalt/stand/boot/cache.c

47

#define trunc_line(x) ((x) & ~(CACHELINESIZE - 1))

sys/arch/cobalt/stand/boot/cache.c

61

va += CACHELINESIZE;

sys/arch/cobalt/stand/boot/cache.c

75

va += CACHELINESIZE;

sys/arch/cobalt/stand/boot/cache.c

89

va += CACHELINESIZE;

sys/arch/cobalt/stand/boot/tlp.c

177

l = ALLOC(struct local, CACHELINESIZE);

sys/arch/cobalt/stand/boot/tlp.c

84

#if CACHELINESIZE > DESCSIZE

sys/arch/cobalt/stand/boot/tlp.c

85

uint8_t pad[CACHELINESIZE - DESCSIZE];

sys/arch/ibmnws/ibmnws/mainbus.c

135

pci_configure_bus(genppc_pct, pcires, 0, CACHELINESIZE);

sys/arch/mips/sibyte/dev/sbmac.c

106

#define NUMCACHEBLKS(x) (((x)+CACHELINESIZE-1)/CACHELINESIZE)

sys/arch/mips/sibyte/dev/sbmac.c

415

CACHELINESIZE - 1, KM_SLEEP);

sys/arch/mips/sibyte/dev/sbmac.c

416

d->sbdma_dscrtable = (sbdmadscr_t *)roundup2(ptr, CACHELINESIZE);

sys/arch/mvmeppc/mvmeppc/mainbus.c

129

pci_configure_bus(genppc_pct, pcires, 0, CACHELINESIZE);

sys/arch/ofppc/pci/ofwpci.c

227

if (pci_configure_bus(pc, pcires, 0, CACHELINESIZE))

sys/arch/powerpc/ibm4xx/pmap.c

1221

[size] "r" (CACHELINESIZE));

sys/arch/powerpc/ibm4xx/pmap.c

700

for (i = PAGE_SIZE/CACHELINESIZE; i > 0; i--) {

sys/arch/powerpc/ibm4xx/pmap.c

702

pa += CACHELINESIZE;

sys/arch/powerpc/ibm4xx/trap.c

793

: [n] "r" (nlines), [pf] "b" (3 * CACHELINESIZE) \

sys/arch/powerpc/ibm4xx/trap.c

811

if (len < 3 * CACHELINESIZE ||

sys/arch/powerpc/ibm4xx/trap.c

817

head = (uintptr_t)(-(intptr_t)(uintptr_t)d) & (CACHELINESIZE - 1);

sys/arch/powerpc/ibm4xx/trap.c

824

nlines = len / CACHELINESIZE;

sys/arch/powerpc/ibm4xx/trap.c

825

tail = len & (CACHELINESIZE - 1);

sys/arch/powerpc/include/cpu.h

483

#if !defined(CACHELINESIZE) && !defined(_MODULE) \

sys/arch/powerpc/mpc5200/mpc5200_pci.c

437

if (pci_configure_bus(pc, pcires, 0, CACHELINESIZE))

sys/arch/powerpc/oea/ofw_autoconf.c

334

CACHELINESIZE);

sys/arch/prep/prep/mainbus.c

158

pci_configure_bus(genppc_pct, pcires, 0, CACHELINESIZE);

sys/lib/libkern/arch/powerpc/syncicache.c

47

#ifndef CACHELINESIZE

sys/lib/libkern/arch/powerpc/syncicache.c

51

CACHELINESIZE,

sys/lib/libkern/arch/powerpc/syncicache.c

52

CACHELINESIZE,

sys/lib/libkern/arch/powerpc/syncicache.c

53

CACHELINESIZE,

sys/lib/libkern/arch/powerpc/syncicache.c

54

CACHELINESIZE