sys/arch/arm/cortex/a9tmr.c

154

a9tmr_global_write(sc, TMR_GBL_CTL, TMR_CTL_ENABLE);

sys/arch/arm/cortex/a9tmr.c

189

a9tmr_global_write(sc, TMR_GBL_AUTOINC, sc->sc_autoinc);

sys/arch/arm/cortex/a9tmr.c

196

a9tmr_global_write(sc, TMR_GBL_CTL,

sys/arch/arm/cortex/a9tmr.c

204

a9tmr_global_write(sc, TMR_GBL_CMP_L, (uint32_t) now);

sys/arch/arm/cortex/a9tmr.c

205

a9tmr_global_write(sc, TMR_GBL_CMP_H, (uint32_t) (now >> 32));

sys/arch/arm/cortex/a9tmr.c

210

a9tmr_global_write(sc, TMR_GBL_INT, 1); /* clear interrupt pending */

sys/arch/arm/cortex/a9tmr.c

213

a9tmr_global_write(sc, TMR_GBL_CTL, ctl);

sys/arch/arm/cortex/a9tmr.c

331

a9tmr_global_write(sc, TMR_GBL_INT, 1); /* Ack the interrupt */