_val
struct _val;
static struct sockaddr *parse_sockaddr(struct _val *addrbuf,
struct _val *portbuf);
parse_sockaddr(struct _val *addrbuf, struct _val *portbuf)
#define TLDEV_DTYPE(_val) ((_val) & TLDEV_DTYPE_MASK)
# define TLDEV_ISCPU(_val) (TLDEV_DTYPE(_val) & 0x8000)
# define TLDEV_ISMEM(_val) (TLDEV_DTYPE(_val) & 0x4000)
# define TLDEV_ISIOPORT(_val) (TLDEV_DTYPE(_val) & 0x2000)
#define TLDEV_SWREV(_val) (((_val) >> 16) & 0xff)
#define TLDEV_HWREV(_val) (((_val) >> 24) & 0xff)
#define TLSB_PUT_NODEREG(_node, _reg, _val) \
*(volatile uint32_t *)(TLSB_NODE_REG_ADDR((_node), (_reg))) = (_val)
#define TLSB_PUT_BCASTREG(_reg, _val) \
*(volatile uint32_t *)(TLSB_BCAST_REG_ADDR + (_reg)) = (_val)
#define PIO_WRITE(_sc, _reg, _val) bus_space_write_4((_sc)->sc_iot, (_sc)->sc_ioh, (_reg), (_val))
#define PIOA_WRITE(_reg, _val) do {*((volatile uint32_t *)(AT91RM9200_PIOA_BASE + (_reg))) = (_val);} while (0)
#define PIOB_WRITE(_reg, _val) do {*((volatile uint32_t *)(AT91RM9200_PIOB_BASE + (_reg))) = (_val);} while (0)
#define PIOC_WRITE(_reg, _val) do {*((volatile uint32_t *)(AT91RM9200_PIOC_BASE + (_reg))) = (_val);} while (0)
#define PIOD_WRITE(_reg, _val) do {*((volatile uint32_t *)(AT91RM9200_PIOD_BASE + (_reg))) = (_val);} while (0)
#define PIOA_WRITE(_reg, _val) do {*((volatile uint32_t *)(AT91SAM9260_PIOA_BASE + (_reg))) = (_val);} while (0)
#define PIOB_WRITE(_reg, _val) do {*((volatile uint32_t *)(AT91SAM9260_PIOB_BASE + (_reg))) = (_val);} while (0)
#define PIOC_WRITE(_reg, _val) do {*((volatile uint32_t *)(AT91SAM9260_PIOC_BASE + (_reg))) = (_val);} while (0)
#define PIOA_WRITE(_reg, _val) do {*((volatile uint32_t *)(AT91SAM9261_PIOA_BASE + (_reg))) = (_val);} while (0)
#define PIOB_WRITE(_reg, _val) do {*((volatile uint32_t *)(AT91SAM9261_PIOB_BASE + (_reg))) = (_val);} while (0)
#define PIOC_WRITE(_reg, _val) do {*((volatile uint32_t *)(AT91SAM9261_PIOC_BASE + (_reg))) = (_val);} while (0)
type _val; \
__asm(#rd " %" #reg ",%0" : "=r" (_val) : : constasm_clobbers); \
return _val; \
type _val; \
__asm volatile(#rd " %" #reg ",%0" : "=r" (_val)); \
return _val; \
static __inline void set##name(type _val) \
__asm volatile(#wr " %0,0,%" #reg : : "r" (_val) : "memory"); \
static __inline void set##name(uint64_t _val) \
uint32_t _hi = _val >> 32, _lo = _val; \
str2hex(const char *p, int *_val)
*_val = val;
#define syscon_write_4(_syscon, _reg, _val) \
(_syscon)->write_4((_syscon)->priv, (_reg), (_val))
u_int16_t _val;
_val = AscReadLramWord(iot, ioh, q_addr + ASC_SCSIQ_B_STATUS);
scsiq->q_status = LO_BYTE(_val);
scsiq->q_no = HI_BYTE(_val);
_val = AscReadLramWord(iot, ioh, q_addr + ASC_SCSIQ_B_CNTL);
scsiq->cntl = LO_BYTE(_val);
sg_queue_cnt = HI_BYTE(_val);
_val = AscReadLramWord(iot, ioh, q_addr + ASC_SCSIQ_B_SENSE_LEN);
scsiq->sense_len = LO_BYTE(_val);
scsiq->extra_bytes = HI_BYTE(_val);
#define IWM_CSR_HW_REV_DASH(_val) (((_val) & 0x0000003) >> 0)
#define IWM_CSR_HW_REV_STEP(_val) (((_val) & 0x000000C) >> 2)
#define LACP_TIMER_ARM(_lacpp, _timer, _val) \
(_lacpp)->lp_timer[(_timer)] = (_val)
#define LACP_PTIMER_ARM(_sc, _timer, _val) \
(_sc)->lsc_timer[(_timer)] = (_val)
#define PUTADDR(_type, _val) \
memcpy(p, &_val.s_addr, 4); \