sys/arch/playstation2/dev/emac3.c

103

r = _emac3_reg_read_4(EMAC3_MR1);

sys/arch/playstation2/dev/emac3.c

114

sc->mode1_reg = _emac3_reg_read_4(EMAC3_MR1);

sys/arch/playstation2/dev/emac3.c

130

while (((_emac3_reg_read_4(EMAC3_TMR0) & TMR0_GNP0) != 0) &&

sys/arch/playstation2/dev/emac3.c

168

_emac3_reg_read_4(EMAC3_MR0) & ~(MR0_TXE | MR0_RXE));

sys/arch/playstation2/dev/emac3.c

171

while (((_emac3_reg_read_4(EMAC3_MR0) & (MR0_RXI | MR0_TXI)) !=

sys/arch/playstation2/dev/emac3.c

197

_emac3_reg_write_4(EMAC3_ISR, _emac3_reg_read_4(EMAC3_ISR));

sys/arch/playstation2/dev/emac3.c

203

u_int32_t r = _emac3_reg_read_4(EMAC3_ISR);

sys/arch/playstation2/dev/emac3.c

222

return (_emac3_reg_read_4(EMAC3_TMR0) & TMR0_GNP0);

sys/arch/playstation2/dev/emac3.c

233

r = _emac3_reg_read_4(EMAC3_RMR);

sys/arch/playstation2/dev/emac3.c

271

while ((_emac3_reg_read_4(EMAC3_MR0) & MR0_SRST) == MR0_SRST &&

sys/arch/playstation2/dev/emac3.c

346

*val =(_emac3_reg_read_4(EMAC3_STACR) >> STACR_PHYDSHIFT) & 0xffff;

sys/arch/playstation2/dev/emac3.c

360

r = _emac3_reg_read_4(EMAC3_MR1);

sys/arch/playstation2/dev/emac3.c

384

sc->mode1_reg = _emac3_reg_read_4(EMAC3_MR1);

sys/arch/playstation2/dev/emac3.c

393

while ((_emac3_reg_read_4(EMAC3_STACR) & STACR_OC) == 0 &&