__register_t
typedef __register_t memword_t;
__register_t *regs = (void *)(sc + 1);
register __register_t dp __asm("r27");
if (sc->sc_regs[_R_SP] == 0 || sc->sc_regs[_R_ZERO] != (__register_t)0xACEDBADEU)
__register_t jb_regs[6];
puffs_cookie_t, int, __register_t *);
puffs_cookie_t, int, __register_t *); \
int name, __register_t *retval)
typedef __register_t register_t;
typedef __register_t register_t;
void (*md_syscall)(__register_t, struct lwp *, struct frame *);
__register_t r_regs[38];
__register_t r_regs[8];
_SIGCONTEXT_DEFINE(sigcontext, __register_t, __fpregister_t);
typedef __register_t register_t;
typedef __register_t mips_reg_t;
__register_t tf_ear; // 64-bit register
__register_t tf_sr;
__register_t tf_pc;
__register_t tf_dar;
__register_t tf_pad0[2];
__register_t tf_dear;
__register_t tf_mcar;
__register_t tf_sprg1;
__register_t ktf_sp;
__register_t ktf_lr;
__register_t ktf_cframe_lr; /* for DDB */
__register_t sf_sp;
__register_t sf_lr;
__register_t sf_user_sr; /* VSID on IBM4XX */
__register_t sf_cr; /* why? CR is volatile. */
__register_t sf_fixreg2;
__register_t sf_fixreg[19]; /* R13-R31 */
__register_t cf_sp;
__register_t cf_lr;
__register_t cf_r30;
__register_t cf_r31;
__register_t r_fixreg[32];
__register_t r_lr;
__register_t r_ctr;
__register_t fixreg[32];
__register_t lr;
__register_t ctr;
__register_t srr0;
__register_t srr1;
__register_t cf_srr0;
__register_t cf_srr1;
__register_t fixreg[32];
__register_t lr; /* Link Register */
__register_t ctr; /* Count Register */
__register_t pc; /* Program Counter */
__register_t vrsave; /* SPR 256 */
__register_t spare[2]; /* filler */
__register_t vscr; /* Vector Status And Control Register */
typedef __register_t register_t;
tf->tf_fixreg[ra] = (__register_t)dear;
void (*md_syscall)(__register_t, struct trapframe *, __register_t);
void (*md_syscall)(struct trapframe64 *, __register_t, __register_t);
__register_t pvnr_retval; /* IN */
__register_t retval;
__register_t ktr_retval;
__register_t ktr_retval_1;