Symbol: __SHIFTOUT_MASK
sys/arch/arm/altera/cycv_clkmgr.c
398
if (__SHIFTOUT_MASK(clk->u.div.mask) > 0xf)
sys/arch/arm/altera/cycv_clkmgr.c
489
if (__SHIFTOUT_MASK(clk->u.div.mask) > 0xf)
sys/arch/arm/amlogic/meson_clk_div.c
122
if (raw_div > __SHIFTOUT_MASK(div->div)) {
sys/arch/arm/amlogic/meson_clk_pll.c
80
rate += howmany(frac_rate, __SHIFTOUT_MASK(pll->frac.mask) + 1);
sys/arch/arm/apple/apple_iic.c
231
KASSERT(sc->sc_clkdiv <= __SHIFTOUT_MASK(I2C_CTL_CLK_MASK));
sys/arch/arm/nvidia/tegra_apbdma.c
203
if (req > __SHIFTOUT_MASK(APBDMACHAN_CSR_REQ_SEL))
sys/arch/arm/nxp/imx_ccm_composite.c
132
for (u_int prediv = 1; prediv <= __SHIFTOUT_MASK(TARGET_ROOT_PRE_PODF) + 1; prediv++) {
sys/arch/arm/nxp/imx_ccm_composite.c
133
for (u_int postdiv = 1; postdiv <= __SHIFTOUT_MASK(TARGET_ROOT_POST_PODF) + 1; postdiv++) {
sys/arch/arm/nxp/imx_ccm_div.c
89
for (n = 0; n < __SHIFTOUT_MASK(div->mask); n++) {
sys/arch/arm/rockchip/rk_cru_composite.c
183
for (u_int div = 1; div <= __SHIFTOUT_MASK(composite->div_mask) + 1; div++) {
sys/arch/arm/samsung/exynos5410_clock.c
809
for (tmp_div = 0; tmp_div < __SHIFTOUT_MASK(ediv->bits); tmp_div++) {
sys/arch/arm/samsung/exynos5422_clock.c
856
for (tmp_div = 0; tmp_div < __SHIFTOUT_MASK(ediv->bits); tmp_div++) {
sys/arch/arm/sunxi/sun4i_a10_codec.c
161
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun4i_a10_codec.c
184
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun4i_a10_codec.c
220
256 / (__SHIFTOUT_MASK(mix->mask) + 1);
sys/arch/arm/sunxi/sun4i_spi.c
194
for (cctl = 0; cctl <= __SHIFTOUT_MASK(SPI_CCTL_CDR1); cctl++) {
sys/arch/arm/sunxi/sun50i_a64_acodec.c
297
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun50i_a64_acodec.c
386
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun50i_a64_acodec.c
459
256 / (__SHIFTOUT_MASK(mix->mask) + 1);
sys/arch/arm/sunxi/sun50i_a64_acodec.c
476
256 / (__SHIFTOUT_MASK(mix->mask) + 1);
sys/arch/arm/sunxi/sun6i_a31_codec.c
222
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun6i_a31_codec.c
245
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun6i_a31_codec.c
281
256 / (__SHIFTOUT_MASK(mix->mask) + 1);
sys/arch/arm/sunxi/sun6i_dma.c
248
if (portid > __SHIFTOUT_MASK(DMA_CFG_SRC_DRQ_TYPE))
sys/arch/arm/sunxi/sun6i_spi.c
228
for (cctl = 0; cctl <= __SHIFTOUT_MASK(SPI_CCTL_CDR1); cctl++) {
sys/arch/arm/sunxi/sun8i_h3_codec.c
297
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun8i_h3_codec.c
330
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun8i_h3_codec.c
383
256 / (__SHIFTOUT_MASK(mix->mask) + 1);
sys/arch/arm/sunxi/sun8i_v3s_codec.c
279
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun8i_v3s_codec.c
309
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
sys/arch/arm/sunxi/sun8i_v3s_codec.c
359
256 / (__SHIFTOUT_MASK(mix->mask) + 1);
sys/arch/arm/sunxi/sunxi_ccu_div.c
173
if (raw_div > __SHIFTOUT_MASK(div->div))
sys/arch/arm/sunxi/sunxi_hdmiphy.c
344
b_out = MIN(b_out + inittab->b_offset, __SHIFTOUT_MASK(ANA_STS_B_OUT));
sys/arch/arm/sunxi/sunxi_hdmiphy.c
378
for (prediv = 0; prediv <= __SHIFTOUT_MASK(PLL_CFG2_PREDIV); prediv++) {
sys/arch/arm/sunxi/sunxi_sramc.c
256
if (config > __SHIFTOUT_MASK(node->area->mask))
sys/arch/arm/sunxi/sunxi_ts.c
144
.maxx = __SHIFTOUT_MASK(TP_DATA_MASK),
sys/arch/arm/sunxi/sunxi_ts.c
145
.maxy = __SHIFTOUT_MASK(TP_DATA_MASK),
sys/arch/arm/sunxi/sunxi_ts.c
273
x = __SHIFTOUT_MASK(TP_DATA_MASK) - x;
sys/arch/arm/sunxi/sunxi_ts.c
275
y = __SHIFTOUT_MASK(TP_DATA_MASK) - y;
sys/arch/i386/pci/elan520.c
810
KASSERT(sz / blksz - 1 <= __SHIFTOUT_MASK(size_field));
sys/arch/i386/pci/elan520.c
811
KASSERT(addr / blksz <= __SHIFTOUT_MASK(addr_field));
sys/arch/mips/adm5120/dev/admpci.c
283
return 1 + __SHIFTOUT_MASK(ADMPCI_TAG_DEVICE_MASK);
sys/arch/mips/adm5120/dev/admpci.c
289
if (bus > __SHIFTOUT_MASK(ADMPCI_TAG_BUS_MASK) ||
sys/arch/mips/adm5120/dev/admpci.c
290
device > __SHIFTOUT_MASK(ADMPCI_TAG_DEVICE_MASK) ||
sys/arch/mips/adm5120/dev/admpci.c
291
function > __SHIFTOUT_MASK(ADMPCI_TAG_FUNCTION_MASK))
sys/arch/mips/adm5120/dev/admpci.c
328
if (reg > __SHIFTOUT_MASK(ADMPCI_TAG_REGISTER_MASK))
sys/arch/mips/adm5120/dev/admwdog.c
50
#define ADMWDOG_MAX_PERIOD (__SHIFTOUT_MASK(ADM5120_WDOG_WTS_MASK) / 100)
sys/arch/riscv/include/pmap.h
94
#define PMAP_TLB_NUM_PIDS (__SHIFTOUT_MASK(SATP_ASID) + 1)
sys/arch/riscv/riscv/riscv_machdep.c
767
const uint64_t maxppn = __SHIFTOUT_MASK(PTE_PPN) - 1;
sys/arch/riscv/starfive/jh7100_pinctrl.c
218
case 0 ... __SHIFTOUT_MASK(PAD_SLEW_RATE_MASK):
sys/arch/riscv/starfive/jh7100_pinctrl.c
96
#define PAD_DS_MAX __SHIFTOUT_MASK(PAD_DRIVE_STRENGTH_MASK)
sys/arch/riscv/starfive/jh71x0_clkc.c
156
KASSERT(i <= __SHIFTOUT_MASK(JH71X0_CLK_MUX_MASK));
sys/arch/riscv/starfive/jh71x0_clkc.c
260
KASSERT(div <= __SHIFTOUT_MASK(JH71X0_CLK_DIV_MASK));
sys/arch/riscv/starfive/jh71x0_clkc.c
333
KASSERT(div <= __SHIFTOUT_MASK(JH71X0_CLK_DIV_MASK));
sys/arch/riscv/starfive/jh71x0_clkc.c
376
KASSERT(i <= __SHIFTOUT_MASK(JH71X0_CLK_MUX_MASK));
sys/arch/riscv/starfive/jh71x0_clkc.c
449
KASSERT(div <= __SHIFTOUT_MASK(JH71X0_CLK_DIV_MASK));
sys/dev/i2c/es8316ac.c
358
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask[ch]));
sys/dev/i2c/es8316ac.c
361
nvol = __SHIFTOUT_MASK(mix->mask[ch]) - nvol;
sys/dev/i2c/es8316ac.c
412
shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask[ch]));
sys/dev/i2c/es8316ac.c
415
nvol = __SHIFTOUT_MASK(mix->mask[ch]) - nvol;
sys/dev/i2c/es8316ac.c
463
256 / (__SHIFTOUT_MASK(mix->mask[0]) + 1);
sys/dev/i2c/rkpmic.c
584
if (vsel > __SHIFTOUT_MASK(c->vsel_mask))
sys/dev/ic/atw.c
1880
KASSERT((addr & ~__SHIFTOUT_MASK(SI4126_TWI_ADDR_MASK)) == 0);
sys/dev/ic/atw.c
1881
KASSERT((val & ~__SHIFTOUT_MASK(SI4126_TWI_DATA_MASK)) == 0);
sys/dev/ic/atw.c
1919
KASSERT((addr & ~__SHIFTOUT_MASK(SI4126_TWI_ADDR_MASK)) == 0);
sys/dev/ic/rtw.c
3634
intval = MIN(intval0, __SHIFTOUT_MASK(RTW_BCNITV_BCNITV_MASK));
sys/dev/ic/rtwphyio.c
268
KASSERT((addr & ~__SHIFTOUT_MASK(SA2400_TWI_ADDR_MASK)) == 0);
sys/dev/ic/rtwphyio.c
269
KASSERT((val & ~__SHIFTOUT_MASK(SA2400_TWI_DATA_MASK)) == 0);
sys/dev/ic/rtwphyio.c
276
KASSERT((addr & ~__SHIFTOUT_MASK(SI4126_TWI_ADDR_MASK)) == 0);
sys/dev/ic/rtwphyio.c
277
KASSERT((val & ~__SHIFTOUT_MASK(SI4126_TWI_DATA_MASK)) == 0);
sys/dev/ic/rtwphyio.c
283
KASSERT((addr & ~__SHIFTOUT_MASK(SI4126_TWI_ADDR_MASK)) == 0);
sys/dev/ic/rtwphyio.c
284
KASSERT((val & ~__SHIFTOUT_MASK(SI4126_TWI_DATA_MASK)) == 0);
sys/dev/ic/rtwphyio.c
334
(addr & ~__SHIFTOUT_MASK(RTW_PHYCFG_MAC_PHILIPS_ADDR_MASK)) == 0);
sys/dev/ic/rtwphyio.c
336
(val & ~__SHIFTOUT_MASK(RTW_PHYCFG_MAC_PHILIPS_DATA_MASK)) == 0);
sys/dev/ic/rtwphyio.c
65
KASSERT((addr & ~__SHIFTOUT_MASK(RTW_BB_ADDR_MASK)) == 0);
sys/dev/ic/rtwphyio.c
84
KASSERT((addr & ~__SHIFTOUT_MASK(RTW_BB_ADDR_MASK)) == 0);
sys/dev/ic/rtwphyio.c
85
KASSERT((val & ~__SHIFTOUT_MASK(RTW_BB_WR_MASK)) == 0);
sys/dev/mii/mcommphy.c
108
CTASSERT(__SHIFTOUT_MASK(YT8531_RGMII_RXD_DS_HIMASK) ==
sys/dev/mii/mcommphy.c
109
__SHIFTOUT_MASK(YT8531_RGMII_RXD_DS_HIBITS));
sys/dev/mii/mcommphy.c
110
CTASSERT(__SHIFTOUT_MASK(YT8531_RGMII_RXD_DS_LOMASK) ==
sys/dev/mii/mcommphy.c
111
__SHIFTOUT_MASK(YT8531_RGMII_RXD_DS_LOBITS));
sys/dev/pci/if_sip.c
1967
if (thresh <= __SHIFTOUT_MASK(sc->sc_bits.b_txcfg_drth_mask)
sys/dev/pci/if_sip.c
2732
sc->sc_rx_drain_thresh = __SHIFTOUT_MASK(RXCFG_DRTH_MASK);
sys/dev/usb/ohcireg.h
206
#define OHCI_TD_NOINTR __SHIFTOUT_MASK(OHCI_TD_DI_MASK)
sys/dev/usb/ohcireg.h
219
#define OHCI_TD_NOCC __SHIFTOUT_MASK(OHCI_TD_CC_MASK)
sys/dev/usb/ohcireg.h
247
#define OHCI_ITD_NOCC __SHIFTOUT_MASK(OHCI_ITD_CC_MASK)
sys/dev/usb/slurm.c
58
#define SI470X_VOLFACT (255 / __SHIFTOUT_MASK(SI470X_VOLUME))
sys/dev/usb/uhci.c
2891
KASSERTMSG(len <= __SHIFTOUT_MASK(UHCI_TD_MAXLEN_MASK),
sys/dev/usb/uhcireg.h
151
((__SHIFTOUT((s), UHCI_TD_ACTLEN_MASK) + 1) & __SHIFTOUT_MASK(UHCI_TD_ACTLEN_MASK))
sys/dev/usb/uhcireg.h
186
__SHIFTIN((((l)-1) & __SHIFTOUT_MASK(UHCI_TD_MAXLEN_MASK)), UHCI_TD_MAXLEN_MASK)