__PPCBITS
{ __PPCBITS( 0, 1), __PPCBITS( 0, 1), 0 }, /* GPIO_1 */
{ __PPCBIT(2), __PPCBITS( 2, 3), 0 }, /* GPIO_2 */
{ __PPCBITS( 4, 5), __PPCBITS( 4, 5), 0 }, /* GPIO_3 */
{ __PPCBITS( 6, 7), __PPCBITS( 6, 7), 0 }, /* GPIO_4 */
{ __PPCBITS( 8, 9), __PPCBITS( 8, 9), 0 }, /* GPIO_5 */
{ __PPCBITS(10,11), __PPCBITS(10,11), 0 }, /* GPIO_6 */
{ __PPCBITS(12,13), __PPCBITS(12,13), 0 }, /* GPIO_7 */
{ __PPCBITS(14,15), __PPCBITS(14,15), 0 }, /* GPIO_8 */
{ __PPCBIT(3), __PPCBITS(18,19), 0 }, /* GPIO_9 */
#define ERR_SBE_SBET __PPCBITS(8,15)
#define ERR_SBE_SBEC __PPCBITS(24,31)
#define PEXOWAR_TC __PPCBITS(8,10) /* traffic class PCIEX only */
#define PEXOWAR_RTT __PPCBITS(12,15) /* read transaction type */
#define PEXOWAR_WTT __PPCBITS(16,19) /* write transaction type */
#define PEXOWAR_OWS __PPCBITS(26,31) /* encoded as 2^(N+1) bytes */
#define PEXIWAR_TRGT __PPCBITS(8,11) /* traffic class PCIEX only */
#define PEXIWAR_RTT __PPCBITS(12,15) /* read transaction type */
#define PEXIWAR_WTT __PPCBITS(16,19) /* write transaction type */
#define PEXIWAR_IWS __PPCBITS(26,31) /* encoded as 2^(N+1) bytes */
#define L2CTL_L2SIZ __PPCBITS(2,3)
#define L2CTL_L2SRAM __PPCBITS(13,15)
#define L2CTL_L2LFRID __PPCBITS(22,23)
#define L2CTL_L2STASH __PPCBITS(30,31)
#define SPMODE_HO_ADJ __PPCBITS(13,15) /* Data output hold adjustment */
#define SPMODE_TXTHR __PPCBITS(18,23) /* Tx FIFO Threshold: 1-32 */
#define SPMODE_RXTHR __PPCBITS(27,31) /* Rx FIFO threshold: 0-31 */
#define SPIE_RXCNT __PPCBITS(2,7) /* current number of full Rx FIFO bytes */
#define SPIE_TXCNT __PPCBITS(10,15) /* current number of full Tx FIFO bytes */
#define SPCOM_CS __PPCBITS(0,1) /* Chip select: 0=CS0, 1=CS1, 2=CS2(P1025), 3=CS3(P1025) */
#define SPCOM_RXSKIP __PPCBITS(8,15) /* if RxSKIP != 0: Number of characters skipped for reception from frame start */
#define SPCOM_TRANLEN __PPCBITS(16,31) /* Transaction length */
#define SPMODEn_PM __PPCBITS(4,7) /* Prescale modulus select */
#define SPMODEn_LEN __PPCBITS(12,15) /* Character length in bits per character */
#define SPMODEn_CSBEF __PPCBITS(16,19) /* CS assertion time in bits before frame start */
#define SPMODEn_CSAFT __PPCBITS(20,23) /* CS assertion time in bits after frame end */
#define SPMODEn_CSCG __PPCBITS(24,28) /* Clock gap */
#define E500_RATIO2 __PPCBITS(2,7)
#define E500_RATIO __PPCBITS(10,15)
#define PLAT_RATIO __PPCBITS(26,30)
#define PORBMSR_BCFG __PPCBITS(0,1)
#define PORBMSR_HA __PPCBITS(13,15)
#define PORDEVSR_ECP1 __PPCBITS(6,7)
#define PORDEVSR_IOSEL_P1023 __PPCBITS(9,10)
#define PORDEVSR_IOSEL __PPCBITS(9,12)
#define BPTR_BOOT_PAGE __PPCBITS(8,31) /* high 24 bits of phys addr */
#define PORDEVSR_ECP2 __PPCBITS(18,19)
#define PORDEVSR_ECP3 __PPCBITS(20,21)
#define PORDEVSR_ECP4 __PPCBITS(22,23)
#define PMUXCR_USB_PCTL __PPCBITS(6,5)
#define BNDS_SA __PPCBITS(4,15)
#define BNDS_EA __PPCBITS(20,31)
#define BR_BA __PPCBITS(0,16)
#define BR_XBA __PPCBITS(17,18)
#define BR_PS __PPCBITS(19,20)
#define BR_DECC __PPCBITS(21,22)
#define BR_MSEL __PPCBITS(24,26)
#define BR_ATOM __PPCBITS(28,29)
#define OR_AM __PPCBITS(0,16)
#define OR_XAM __PPCBITS(17,18)
#define OR_ACS __PPCBITS(21,22)
#define OR_SCY __PPCBITS(24,27)
#define MDR_AS3 __PPCBITS(0,7)
#define MDR_AS2 __PPCBITS(8,15)
#define SDRAM_CFG_TYPE __PPCBITS(5,7)
#define MDR_AS1 __PPCBITS(16,23)
#define MDR_AS0 __PPCBITS(24,31)
#define LTEATR_SRCID __PPCBITS(11,15)
#define LTEATR_PB __PPCBITS(16,19)
#define SDRAM_CFG_DBW __PPCBITS(11,12)
#define LTEATR_BNK __PPCBITS(20,27)
#define LTECCR_SBCE __PPCBITS(12,15)
#define LTECCR_MBUE __PPCBITS(28,31)
#define FMR_CWTO __PPCBITS(16,19)
#define FMR_AL __PPCBITS(26,27)
#define FMR_OP __PPCBITS(30,31)
#define FIR_OP0 __PPCBITS(0,3)
#define FIR_OP1 __PPCBITS(4,7)
#define FIR_OP2 __PPCBITS(8,11)
#define FIR_OP3 __PPCBITS(12,15)
#define FIR_OP4 __PPCBITS(16,19)
#define FIR_OP5 __PPCBITS(20,23)
#define FIR_OP6 __PPCBITS(24,27)
#define FIR_OP7 __PPCBITS(28,31)
#define FCR_CMD0 __PPCBITS(0,7)
#define FCR_CMD1 __PPCBITS(8,15)
#define FCR_CMD2 __PPCBITS(16,23)
#define FCR_CMD3 __PPCBITS(24,31)
#define FBAR_BLK __PPCBITS(8,31)
#define FPAR_S_PI __PPCBITS(17,21) /* Page Index */
#define FPAR_S_CI __PPCBITS(23,31) /* Column Index */
#define FPAR_L_PI __PPCBITS(14,19) /* Page Index */
#define FPAR_L_CI __PPCBITS(21,31) /* Column Index */
#define FBCR_BC __PPCBITS(20,31)
#define MXMR_OP __PPCBITS(2,3) /* Command opcode */
#define MXMR_AM __PPCBITS(5,7) /* Address multiplex size */
#define MXMR_DS __PPCBITS(8,9) /* Disable timer period */
#define MXMR_G0CL __PPCBITS(10,12) /* General line 0 control */
#define MXMR_RLF __PPCBITS(14,17) /* Read loop field */
#define MXMR_WLF __PPCBITS(18,21) /* Write loop field */
#define MXMR_TLF __PPCBITS(22,25) /* Refresh loop field */
#define MXMR_MAS __PPCBITS(26,31) /* Machine Address */
#define MRTPR_PTP __PPCBITS(0,7) /* Refresh timers prescaler */
#define CATTR_BNUM __PPCBITS(1,3)
#define CATTR_TSIZ __PPCBITS(5,7)
#define CATTR_TSRC __PPCBITS(11,15)
#define CATTR_TTYP __PPCBITS(18,19)
#define TCTRL_TXSCHED __PPCBITS(29,30) /* transmit ring scheduling algorithm */
#define TSTAT_THLT __PPCBITS(0,7)
#define TSTAT_TXF __PPCBITS(16,23)
#define TXIC_ICFT __PPCBITS(3,10)
#define TXIC_ICTT __PPCBITS(16,31)
#define TQUEUE_EN __PPCBITS(16,23)
#define RCTRL_L2OFF __PPCBITS(0,6)
#define RCTRL_PAL __PPCBITS(11,15)
#define RCTRL_PRSDEP __PPCBITS(24,25)
#define RSTAT_QHLT __PPCBITS(8,15)
#define RSTAT_RXF __PPCBITS(24,31)
#define RXIC_ICFT __PPCBITS(3,10)
#define RXIC_ICTT __PPCBITS(16,31)
#define RQUEUE_EX __PPCBITS(8,15)
#define RQUEUE_EN __PPCBITS(24,31)
#define RQFCR_HASHTBL __PPCBITS(12,14) /* Select between filer Q value and RIR fields. */
#define RQFCR_QUEUE __PPCBITS(16,21) /* Receive queue index */
#define RQFCR_CMP __PPCBITS(25,26) /* Comparison operation to perform on the RQPROP entry at this index when PID > 0 */
#define RQFCR_PID __PPCBITS(28,31)
#define MACCFG2_PRELEN __PPCBITS(16,19)
#define MACCFG2_IFMODE __PPCBITS(22,23)
#define MIIMADD_PHY __PPCBITS(19,23)
#define MIIMADD_REG __PPCBITS(27,31)
#define ATTR_ELCWT __PPCBITS(17,18)
#define ATTR_BDLWT __PPCBITS(20,21)
#define ATTRELI_EL __PPCBITS(2,12) /* extracted length */
#define ATTRELI_EI __PPCBITS(18,28) /* extracted index */
#define RQPRM_FBTHR __PPCBITS(0,7)
#define RQPRM_LEN __PPCBITS(8,31)