__CCGR_NUM
#define CCGR_USBOH1_CLK __CCGR_NUM(2, 13)
#define CCGR_USBPHY1_CLK __CCGR_NUM(4, 5)
#define CCGR_EPDC_PIX_CLK __CCGR_NUM(6, 5)
#define CCGR_EPDC_AXI_CLK __CCGR_NUM(6, 8)
#define CCGR_ARM_BUS_CLK __CCGR_NUM(0, 0)
#define CCGR_ARM_AXI_CLK __CCGR_NUM(0, 1)
#define CCGR_ARM_DEBUG_CLK __CCGR_NUM(0, 2)
#define CCGR_TZIC_CLK __CCGR_NUM(0, 3)
#define CCGR_DAP_CLK __CCGR_NUM(0, 4)
#define CCGR_TPIU_CLK __CCGR_NUM(0, 5)
#define CCGR_CTI2_CLK __CCGR_NUM(0, 6)
#define CCGR_CTI3_CLK __CCGR_NUM(0, 7)
#define CCGR_AHBMUX1_CLK __CCGR_NUM(0, 8)
#define CCGR_AHBMUX2_CLK __CCGR_NUM(0, 9)
#define CCGR_ROMCP_CLK __CCGR_NUM(0, 10)
#define CCGR_ROM_CLK __CCGR_NUM(0, 11)
#define CCGR_AIPS_TZ1_CLK __CCGR_NUM(0, 12)
#define CCGR_AIPS_TZ2_CLK __CCGR_NUM(0, 13)
#define CCGR_AHB_MAX_CLK __CCGR_NUM(0, 14)
#define CCGR_IIM_CLK __CCGR_NUM(0, 15)
#define CCGR_TMAX1_CLK __CCGR_NUM(1, 0)
#define CCGR_TMAX2_CLK __CCGR_NUM(1, 1)
#define CCGR_TMAX3_CLK __CCGR_NUM(1, 2)
#define CCGR_UART1_CLK __CCGR_NUM(1, 3)
#define CCGR_UART1_SERIAL_CLK __CCGR_NUM(1, 4)
#define CCGR_UART2_CLK __CCGR_NUM(1, 5)
#define CCGR_UART2_SERIAL_CLK __CCGR_NUM(1, 6)
#define CCGR_UART3_CLK __CCGR_NUM(1, 7)
#define CCGR_UART3_SERIAL_CLK __CCGR_NUM(1, 8)
#define CCGR_I2C1_SERIAL_CLK __CCGR_NUM(1, 9)
#define CCGR_I2C2_SERIAL_CLK __CCGR_NUM(1, 10)
#define CCGR_HSI2C_CLK __CCGR_NUM(1, 11)
#define CCGR_HSI2C_SERIAL_CLK __CCGR_NUM(1, 12)
#define CCGR_FIRI_CLK __CCGR_NUM(1, 13)
#define CCGR_FIRI_SERIAL_CLK __CCGR_NUM(1, 14)
#define CCGR_SCC_CLK __CCGR_NUM(1, 15)
#define CCGR_USB_PHY_CLK __CCGR_NUM(2, 0)
#define CCGR_EPIT1_CLK __CCGR_NUM(2, 1)
#define CCGR_EPIT1_SERIAL_CLK __CCGR_NUM(2, 2)
#define CCGR_EPIT2_CLK __CCGR_NUM(2, 3)
#define CCGR_ESDHC1_CLK __CCGR_NUM(3, 0)
#define CCGR_ESDHC1_SERIAL_CLK __CCGR_NUM(3, 1)
#define CCGR_ESDHC2_CLK __CCGR_NUM(3, 2)
#define CCGR_ESDHC2_SERIAL_CLK __CCGR_NUM(3, 3)
#define CCGR_ESDHC3_CLK __CCGR_NUM(3, 4)
#define CCGR_ESDHC3_SERIAL_CLK __CCGR_NUM(3, 5)
#define CCGR_ESDHC4_CLK __CCGR_NUM(3, 6)
#define CCGR_ESDHC4_SERIAL_CLK __CCGR_NUM(3, 7)
#define CCGR_SSI1_CLK __CCGR_NUM(3, 8)
#define CCGR_SSI1_SERIAL_CLK __CCGR_NUM(3, 9)
#define CCGR_SSI2_CLK __CCGR_NUM(3, 10)
#define CCGR_SSI2_SERIAL_CLK __CCGR_NUM(3, 11)
#define CCGR_SSI3_CLK __CCGR_NUM(3, 12)
#define CCGR_SSI3_SERIAL_CLK __CCGR_NUM(3, 13)
#define CCGR_SSI_EXT1_CLK __CCGR_NUM(3, 14)
#define CCGR_SSI_EXT2_CLK __CCGR_NUM(3, 15)
#define CCGR_PATA_CLK __CCGR_NUM(4, 0)
#define CCGR_SIM_CLK __CCGR_NUM(4, 1)
#define CCGR_SIM_SERIAL_CLK __CCGR_NUM(4, 2)
#define CCGR_SAHARA_CLK __CCGR_NUM(4, 3)
#define CCGR_RTIC_CLK __CCGR_NUM(4, 4)
#define CCGR_ECSPI1_CLK __CCGR_NUM(4, 5)
#define CCGR_ECSPI1_SERIAL_CLK __CCGR_NUM(4, 6)
#define CCGR_ECSPI2_CLK __CCGR_NUM(4, 7)
#define CCGR_ECSPI2_SERIAL_CLK __CCGR_NUM(4, 8)
#define CCGR_CSPI_CLK __CCGR_NUM(4, 9)
#define CCGR_SRTC_CLK __CCGR_NUM(4, 10)
#define CCGR_SDMA_CLK __CCGR_NUM(4, 11)
#define CCGR_SPBA_CLK __CCGR_NUM(5, 0)
#define CCGR_GPU_CLK __CCGR_NUM(5, 1)
#define CCGR_GARB_CLK __CCGR_NUM(5, 2)
#define CCGR_VPU_CLK __CCGR_NUM(5, 3)
#define CCGR_VPU_SERIAL_CLK __CCGR_NUM(5, 4)
#define CCGR_IPU_CLK __CCGR_NUM(5, 5)
#define CCGR_EMI_GARB_CLK __CCGR_NUM(6, 0)
#define CCGR_IPU_DI0_CLK __CCGR_NUM(6, 1)
#define CCGR_IPU_DI1_CLK __CCGR_NUM(6, 2)
#define CCGR_GPU2D_CLK __CCGR_NUM(6, 3)
#define CCGR_SLIMBUS_CLK __CCGR_NUM(6, 4)
#define CCGR_SLIMBUS_SERIAL_CLK __CCGR_NUM(6, 5)