sys/arch/sparc/sparc/autoconf.c

440

setpte4m(PI_INTR_VA + (_MAXNBPG * i), pte);

sys/arch/sparc/sparc/autoconf.c

443

(PI_INTR_VA + (_MAXNBPG * CPU_MID2CPUNO(bootmid)));

sys/arch/sparc/sparc/cpu.c

605

(PI_INTR_VA + (_MAXNBPG * CPU_MID2CPUNO(cpi->mid)));

sys/arch/sparc/sparc/intreg.h

76

#define IENAB_SYS ((_MAXNBPG * _MAXNCPU) + 0xc)

sys/arch/sparc/sparc/vaddrs.h

80

#define COUNTERREG_VA ( TIMERREG_VA + _MAXNBPG*_MAXNCPU) /* [4m] */

sys/arch/sparc/sparc/vaddrs.h

81

#define ZS0_VA (COUNTERREG_VA + _MAXNBPG)

sys/arch/sparc/sparc/vaddrs.h

82

#define ZS1_VA ( ZS0_VA + _MAXNBPG)

sys/arch/sparc/sparc/vaddrs.h

83

#define AUXREG_VA ( ZS1_VA + _MAXNBPG)

sys/arch/sparc/sparc/vaddrs.h

84

#define TMPMAP_VA ( AUXREG_VA + _MAXNBPG)

sys/arch/sparc/sparc/vaddrs.h

85

#define MSGBUF_VA ( TMPMAP_VA + _MAXNBPG)

sys/arch/sparc/sparc/vaddrs.h

86

#define INTRREG_VA ( MSGBUF_VA + _MAXNBPG) /* [4/4c] */

sys/arch/sparc/sparc/vaddrs.h

87

#define MSIIEP_PCIC_VA ( MSGBUF_VA + _MAXNBPG) /* [IIep] */

sys/arch/sparc/sparc/vaddrs.h

88

#define PI_INTR_VA ( MSGBUF_VA + _MAXNBPG) /* [4m] */

sys/arch/sparc/sparc/vaddrs.h

89

#define SI_INTR_VA ( PI_INTR_VA + _MAXNBPG*_MAXNCPU) /* [4m] */

sys/arch/sparc/sparc/vaddrs.h

90

#define IODEV_BASE ( SI_INTR_VA + _MAXNBPG)

sys/arch/sparc64/include/param.h

167

#define MSGBUF_VA ( KERNEND + _MAXNBPG) /* 1 page REDZONE */

sys/arch/sparc64/include/param.h

172

#define INTSTACK ( KERNEND + 32*_MAXNBPG)

sys/arch/sparc64/include/param.h

173

#define EINTSTACK ( INTSTACK + 4*_MAXNBPG)

sys/arch/sparc64/include/param.h

175

#define PANICSTACK ( INTSTACK + 8*_MAXNBPG)

sys/arch/sparc64/include/param.h

176

#define IODEV_BASE ( INTSTACK + 9*_MAXNBPG) /* 1 page redzone */