Symbol: XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG
sys/arch/arm/nvidia/tegra210_xusbpad.c
236
SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG,
sys/arch/arm/nvidia/tegra210_xusbpad.c
244
SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG,
sys/arch/arm/nvidia/tegra210_xusbpad.c
278
SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG,
sys/arch/arm/nvidia/tegra210_xusbpad.c
282
val = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG);
sys/arch/arm/nvidia/tegra210_xusbpad.c
291
SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG,
sys/arch/arm/nvidia/tegra210_xusbpad.c
295
val = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG);
sys/arch/arm/nvidia/tegra210_xusbpad.c
354
SETCLR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG,