Symbol: XINE_SYS_ASIC
sys/arch/pmax/pmax/dec_maxine.c
150
ioasic_base = MIPS_PHYS_TO_KSEG1(XINE_SYS_ASIC);
sys/arch/pmax/pmax/maxine.h
136
#define XINE_SYS_ROM_START (XINE_SYS_ASIC + IOASIC_SLOT_0_START)
sys/arch/pmax/pmax/maxine.h
137
#define XINE_SYS_ASIC_REGS (XINE_SYS_ASIC + IOASIC_SLOT_1_START)
sys/arch/pmax/pmax/maxine.h
138
#define XINE_SYS_ETHER_ADDRESS (XINE_SYS_ASIC + IOASIC_SLOT_2_START)
sys/arch/pmax/pmax/maxine.h
139
#define XINE_SYS_LANCE (XINE_SYS_ASIC + IOASIC_SLOT_3_START)
sys/arch/pmax/pmax/maxine.h
140
#define XINE_SYS_SCC_0 (XINE_SYS_ASIC + IOASIC_SLOT_4_START)
sys/arch/pmax/pmax/maxine.h
141
#define XINE_SYS_VDAC_HI (XINE_SYS_ASIC + IOASIC_SLOT_5_START)
sys/arch/pmax/pmax/maxine.h
142
#define XINE_SYS_VDAC_LO (XINE_SYS_ASIC + IOASIC_SLOT_7_START)
sys/arch/pmax/pmax/maxine.h
143
#define XINE_SYS_CLOCK (XINE_SYS_ASIC + IOASIC_SLOT_8_START)
sys/arch/pmax/pmax/maxine.h
144
#define XINE_SYS_ISDN (XINE_SYS_ASIC + IOASIC_SLOT_9_START)
sys/arch/pmax/pmax/maxine.h
145
#define XINE_SYS_DTOP (XINE_SYS_ASIC + IOASIC_SLOT_10_START)
sys/arch/pmax/pmax/maxine.h
146
#define XINE_SYS_FLOPPY (XINE_SYS_ASIC + IOASIC_SLOT_11_START)
sys/arch/pmax/pmax/maxine.h
147
#define XINE_SYS_SCSI (XINE_SYS_ASIC + IOASIC_SLOT_12_START)
sys/arch/pmax/pmax/maxine.h
148
#define XINE_SYS_FLOPPY_DMA (XINE_SYS_ASIC + IOASIC_SLOT_13_START)
sys/arch/pmax/pmax/maxine.h
149
#define XINE_SYS_SCSI_DMA (XINE_SYS_ASIC + IOASIC_SLOT_14_START)
sys/arch/pmax/pmax/maxine.h
176
#define XINE_REG_SCSI_DMAPTR ( XINE_SYS_ASIC + IOASIC_SCSI_DMAPTR )
sys/arch/pmax/pmax/maxine.h
177
#define XINE_REG_SCSI_DMANPTR ( XINE_SYS_ASIC + IOASIC_SCSI_NEXTPTR )
sys/arch/pmax/pmax/maxine.h
178
#define XINE_REG_LANCE_DMAPTR ( XINE_SYS_ASIC + IOASIC_LANCE_DMAPTR )
sys/arch/pmax/pmax/maxine.h
179
#define XINE_REG_SCC_T1_DMAPTR ( XINE_SYS_ASIC + IOASIC_SCC_T1_DMAPTR )
sys/arch/pmax/pmax/maxine.h
180
#define XINE_REG_SCC_R1_DMAPTR ( XINE_SYS_ASIC + IOASIC_SCC_R1_DMAPTR )
sys/arch/pmax/pmax/maxine.h
181
#define XINE_REG_DTOP_T_DMAPTR ( XINE_SYS_ASIC + IOASIC_SCC_T2_DMAPTR )
sys/arch/pmax/pmax/maxine.h
182
#define XINE_REG_DTOP_R_DMAPTR ( XINE_SYS_ASIC + IOASIC_SCC_R2_DMAPTR )
sys/arch/pmax/pmax/maxine.h
183
#define XINE_FLOPPY_DMAPTR ( XINE_SYS_ASIC + IOASIC_FLOPPY_DMAPTR )
sys/arch/pmax/pmax/maxine.h
184
#define XINE_ISDN_X_DMAPTR ( XINE_SYS_ASIC + IOASIC_ISDN_X_DMAPTR )
sys/arch/pmax/pmax/maxine.h
185
#define XINE_ISDN_X_NEXTPTR ( XINE_SYS_ASIC + IOASIC_ISDN_X_NEXTPTR )
sys/arch/pmax/pmax/maxine.h
186
#define XINE_ISDN_R_DMAPTR ( XINE_SYS_ASIC + IOASIC_ISDN_R_DMAPTR )
sys/arch/pmax/pmax/maxine.h
187
#define XINE_ISDN_R_NEXTPTR ( XINE_SYS_ASIC + IOASIC_ISDN_R_NEXTPTR )
sys/arch/pmax/pmax/maxine.h
188
#define XINE_REG_CSR ( XINE_SYS_ASIC + IOASIC_CSR )
sys/arch/pmax/pmax/maxine.h
189
#define XINE_REG_INTR ( XINE_SYS_ASIC + IOASIC_INTR )
sys/arch/pmax/pmax/maxine.h
190
#define XINE_REG_IMSK ( XINE_SYS_ASIC + IOASIC_IMSK )
sys/arch/pmax/pmax/maxine.h
191
#define XINE_REG_CURADDR ( XINE_SYS_ASIC + IOASIC_CURADDR )
sys/arch/pmax/pmax/maxine.h
192
#define XINE_ISDN_X_DATA ( XINE_SYS_ASIC + IOASIC_ISDN_X_DATA )
sys/arch/pmax/pmax/maxine.h
193
#define XINE_ISDN_R_DATA ( XINE_SYS_ASIC + IOASIC_ISDN_R_DATA )
sys/arch/pmax/pmax/maxine.h
195
#define XINE_REG_LANCE_DECODE ( XINE_SYS_ASIC + IOASIC_LANCE_DECODE )
sys/arch/pmax/pmax/maxine.h
196
#define XINE_REG_SCSI_DECODE ( XINE_SYS_ASIC + IOASIC_SCSI_DECODE )
sys/arch/pmax/pmax/maxine.h
197
#define XINE_REG_SCC0_DECODE ( XINE_SYS_ASIC + IOASIC_SCC0_DECODE )
sys/arch/pmax/pmax/maxine.h
198
#define XINE_REG_DTOP_DECODE ( XINE_SYS_ASIC + IOASIC_SCC1_DECODE )
sys/arch/pmax/pmax/maxine.h
199
#define XINE_REG_FLOPPY_DECODE ( XINE_SYS_ASIC + IOASIC_FLOPPY_DECODE )
sys/arch/pmax/pmax/maxine.h
206
#define XINE_REG_SCSI_SCR ( XINE_SYS_ASIC + IOASIC_SCSI_SCR )
sys/arch/pmax/pmax/maxine.h
207
#define XINE_REG_SCSI_SDR0 ( XINE_SYS_ASIC + IOASIC_SCSI_SDR0 )
sys/arch/pmax/pmax/maxine.h
208
#define XINE_REG_SCSI_SDR1 ( XINE_SYS_ASIC + IOASIC_SCSI_SDR1 )