WDT_WRITE
WDT_WRITE(sc, WATCHDOG_RESET_REG, 0);
WDT_WRITE(sc, WATCHDOG_RESET_REG, 0);
WDT_WRITE(sc, WATCHDOG_TC_REG, val);
WDT_WRITE(sc, WATCHDOG_RESET_REG, 0);
WDT_WRITE(sc, WATCHDOG_TC_REG, val);
WDT_WRITE(sc, WATCHDOG_RESET_REG, 0);
WDT_WRITE(sc, WATCHDOG_TC_REG, WATCHDOG_TC_CPUS | WATCHDOG_TC_ENABLE |
WDT_WRITE(sc, WATCHDOG_TCNT, sc->sc_wdog.smw_period * 1000);
WDT_WRITE(sc, WATCHDOG_CNTL,
WDT_WRITE(sc, WATCHDOG_RESET, 0);
WDT_WRITE(sc, WATCHDOG_CNTL, 0);
WDT_WRITE(sc, WATCHDOG_CNTL, 0);
WDT_WRITE(sc, WATCHDOG_CNTL, 0);
WDT_WRITE(sc, WATCHDOG_RESET, 0);
WDT_WRITE(sc, SUN4I_WDT_MODE_REG, 0);
WDT_WRITE(sc, SUN4I_WDT_MODE_REG, mode);
WDT_WRITE(sc, SUN4I_WDT_CTRL_REG, ctrl);
WDT_WRITE(sc, SUN6I_WDT_MODE_REG, 0);
WDT_WRITE(sc, SUN6I_WDT_CFG_REG, cfg);
WDT_WRITE(sc, SUN6I_WDT_MODE_REG, mode);
WDT_WRITE(sc, SUN6I_WDT_CTRL_REG, ctrl);
WDT_WRITE(sc, SUN6I_WDT_MODE_REG, mode);
WDT_WRITE(sc, SUN6I_WDT_CFG_REG, cfg);
WDT_WRITE(sc, SUN6I_WDT_MODE_REG, mode);
WDT_WRITE(sc, SUN6I_WDT_IRQ_EN_REG, 0);
WDT_WRITE(sc, SUN6I_WDT_MODE_REG, mode);
WDT_WRITE(sc, SUN6I_WDT_IRQ_EN_REG, 0);