sys/arch/hpcmips/isa/isa_machdep.c

163

VR_ISA_PORT_BASE + offset, VR_ISA_PORT_SIZE - offset);

sys/arch/hpcmips/isa/isa_machdep.c

309

i + port - VR_ISA_PORT_BASE);

sys/arch/hpcmips/isa/isa_machdep.c

314

VR_ISA_PORT_BASE, VR_ISA_PORT_BASE + VR_ISA_PORT_SIZE, step);

sys/arch/hpcmips/isa/isa_machdep.c

315

for (i = VR_ISA_PORT_BASE; i < VR_ISA_PORT_BASE+VR_ISA_PORT_SIZE;

sys/arch/hpcmips/isa/isa_machdep.c

360

VR_ISA_PORT_BASE, VR_ISA_PORT_BASE + VR_ISA_PORT_SIZE - 1, step );

sys/arch/hpcmips/isa/isa_machdep.c

362

for (port = VR_ISA_PORT_BASE;

sys/arch/hpcmips/isa/isa_machdep.c

363

port < (VR_ISA_PORT_BASE + VR_ISA_PORT_SIZE); port += step){

sys/arch/hpcmips/vr/vrecu.c

147

sc->iobase = VR_ISA_PORT_BASE + 0x400;

sys/arch/hpcmips/vr/vrecu.c

156

sc->iobase = VR_ISA_PORT_BASE;