sys/arch/hpcmips/vr/vrpciu.c

229

vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_ID_REG));

sys/arch/hpcmips/vr/vrpciu.c

230

reg = vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG);

sys/arch/hpcmips/vr/vrpciu.c

232

vrpciu_write(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG, reg);

sys/arch/hpcmips/vr/vrpciu.c

234

vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG));

sys/arch/hpcmips/vr/vrpciu.c

236

vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_CLASS_REG));

sys/arch/hpcmips/vr/vrpciu.c

238

vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_BHLC_REG));

sys/arch/hpcmips/vr/vrpciu.c

240

vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MAILREG));

sys/arch/hpcmips/vr/vrpciu.c

242

vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MBA1REG));

sys/arch/hpcmips/vr/vrpciu.c

244

vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MBA2REG));

sys/arch/hpcmips/vr/vrpciu.c

246

vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG));

sys/arch/hpcmips/vr/vrpciu.c

248

vrpciu_write(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG,

sys/arch/hpcmips/vr/vrpciu.c

249

vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG) | 0x01);

sys/arch/hpcmips/vr/vrpciu.c

251

vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG));