sys/arch/arm/amlogic/meson_vpureg.h

34

#define VIU_OSD2_CTRL_STAT_REG VPU_REG(0x1a30)

sys/arch/arm/amlogic/meson_vpureg.h

35

#define VIU_OSD2_TCOLOR_AG0_REG VPU_REG(0x1a37)

sys/arch/arm/amlogic/meson_vpureg.h

36

#define VIU_OSD2_TCOLOR_AG1_REG VPU_REG(0x1a38)

sys/arch/arm/amlogic/meson_vpureg.h

37

#define VIU_OSD2_TCOLOR_AG2_REG VPU_REG(0x1a39)

sys/arch/arm/amlogic/meson_vpureg.h

38

#define VIU_OSD2_TCOLOR_AG3_REG VPU_REG(0x1a3a)

sys/arch/arm/amlogic/meson_vpureg.h

39

#define VIU_OSD2_BLK0_CFG_W0_REG VPU_REG(0x1a3b)

sys/arch/arm/amlogic/meson_vpureg.h

40

#define VIU_OSD2_BLK0_CFG_W1_REG VPU_REG(0x1a3c)

sys/arch/arm/amlogic/meson_vpureg.h

41

#define VIU_OSD2_BLK0_CFG_W2_REG VPU_REG(0x1a3d)

sys/arch/arm/amlogic/meson_vpureg.h

42

#define VIU_OSD2_BLK0_CFG_W3_REG VPU_REG(0x1a3e)

sys/arch/arm/amlogic/meson_vpureg.h

43

#define VIU_OSD2_BLK0_CFG_W4_REG VPU_REG(0x1a64)

sys/arch/arm/amlogic/meson_vpureg.h

44

#define VPP_MISC_REG VPU_REG(0x1d26)

sys/arch/arm/amlogic/meson_vpureg.h

45

#define VPP_OSD_VSC_PHASE_STEP_REG VPU_REG(0x1dc0)

sys/arch/arm/amlogic/meson_vpureg.h

46

#define VPP_OSD_VSC_INI_PHASE_REG VPU_REG(0x1dc1)

sys/arch/arm/amlogic/meson_vpureg.h

47

#define VPP_OSD_VSC_CTRL0_REG VPU_REG(0x1dc2)

sys/arch/arm/amlogic/meson_vpureg.h

48

#define VPP_OSD_HSC_PHASE_STEP_REG VPU_REG(0x1dc3)

sys/arch/arm/amlogic/meson_vpureg.h

49

#define VPP_OSD_HSC_INI_PHASE_REG VPU_REG(0x1dc4)

sys/arch/arm/amlogic/meson_vpureg.h

50

#define VPP_OSD_HSC_CTRL0_REG VPU_REG(0x1dc5)

sys/arch/arm/amlogic/meson_vpureg.h

51

#define VPP_OSD_SC_DUMMY_DATA_REG VPU_REG(0x1dc7)

sys/arch/arm/amlogic/meson_vpureg.h

52

#define VPP_OSD_SC_CTRL0_REG VPU_REG(0x1dc8)

sys/arch/arm/amlogic/meson_vpureg.h

53

#define VPP_OSD_SCI_WH_M1_REG VPU_REG(0x1dc9)

sys/arch/arm/amlogic/meson_vpureg.h

54

#define VPP_OSD_SCO_H_REG VPU_REG(0x1dca)

sys/arch/arm/amlogic/meson_vpureg.h

55

#define VPP_OSD_SCO_V_REG VPU_REG(0x1dcb)