VIC1REG
VIC1REG(EP93XX_VIC_IntEnClear) = (1U << irq);
VIC1REG(EP93XX_VIC_IntSelect) = 0;
vic1_hwpend = VIC1REG(EP93XX_VIC_IRQStatus);
VIC1REG(EP93XX_VIC_IntEnClear) = vic1_irqs;
VIC1REG(EP93XX_VIC_IntEnable) = vic1_intr_enabled & ~vic1_irqs;
VIC1REG(EP93XX_VIC_IntEnable) = (1U << irq);