sys/dev/pci/unichromefb.c
1121
uni_wr_mask(sc, VIACR, CR17, 0x00, BIT7);
sys/dev/pci/unichromefb.c
1137
uni_wr_mask(sc, VIACR, CR17, 0x80, BIT7);
sys/dev/pci/unichromefb.c
689
uni_wr_mask(sc, VIACR, CR11, BIT7, BIT7);
sys/dev/pci/unichromefb.c
695
uni_wr_mask(sc, VIACR, CR11, 0, BIT7);
sys/dev/pci/unichromefb.c
696
uni_wr_mask(sc, VIACR, CR47, 0, BIT0);
sys/dev/pci/unichromefb.c
702
uni_wr_mask(sc, VIACR, CR36, 0, BIT5+BIT4);
sys/dev/pci/unichromefb.c
708
uni_wr_mask(sc, VIACR, CR36, BIT5+BIT4, BIT5+BIT4);
sys/dev/pci/unichromefb.c
728
uni_wr(sc, VIACR, CR0C, 0x00);
sys/dev/pci/unichromefb.c
729
uni_wr(sc, VIACR, CR0D, 0x00);
sys/dev/pci/unichromefb.c
730
uni_wr(sc, VIACR, CR34, 0x00);
sys/dev/pci/unichromefb.c
731
uni_wr_mask(sc, VIACR, CR48, 0x00, BIT0 + BIT1);
sys/dev/pci/unichromefb.c
733
uni_wr(sc, VIACR, CR62, 0x00);
sys/dev/pci/unichromefb.c
734
uni_wr(sc, VIACR, CR63, 0x00);
sys/dev/pci/unichromefb.c
735
uni_wr(sc, VIACR, CR64, 0x00);
sys/dev/pci/unichromefb.c
736
uni_wr(sc, VIACR, CRA3, 0x00);
sys/dev/pci/unichromefb.c
786
uni_wr(sc, VIACR, CR09, 0x00);
sys/dev/pci/unichromefb.c
787
uni_wr_mask(sc, VIACR, CR11, 0x00, BIT4+BIT5+BIT6);
sys/dev/pci/unichromefb.c
788
uni_wr_mask(sc, VIACR, CR17, 0x00, BIT7);
sys/dev/pci/unichromefb.c
794
uni_wr_mask(sc, VIACR, CR17, 0x80, BIT7);
sys/dev/pci/unichromefb.c
911
uni_load_reg(sc, val, regnum, reg, VIACR);
sys/dev/pci/unichromefb.c
944
if (type == VIACR)
sys/dev/pci/unichromefb.c
945
uni_wr_mask(sc, VIACR, cridx, data, regmask);
sys/dev/pci/unichromefb.c
956
uni_wr_mask(sc, VIACR, CR03, 0x80, BIT7);
sys/dev/pci/unichromefb.c
957
uni_wr(sc, VIACR, CR18, 0xff);
sys/dev/pci/unichromefb.c
958
uni_wr_mask(sc, VIACR, CR07, 0x10, BIT4);
sys/dev/pci/unichromefb.c
959
uni_wr_mask(sc, VIACR, CR09, 0x40, BIT6);
sys/dev/pci/unichromefb.c
960
uni_wr_mask(sc, VIACR, CR35, 0x10, BIT4);
sys/dev/pci/unichromefb.c
961
uni_wr_mask(sc, VIACR, CR33, 0x06, BIT0+BIT1+BIT2);
sys/dev/pci/unichromefb.c
962
uni_wr(sc, VIACR, CR17, 0xe3);
sys/dev/pci/unichromefb.c
963
uni_wr(sc, VIACR, CR08, 0x00);
sys/dev/pci/unichromefb.c
964
uni_wr(sc, VIACR, CR14, 0x00);
sys/dev/pci/unichromefb.c
979
VIACR);
sys/dev/pci/unichromemode.h
106
{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */
sys/dev/pci/unichromemode.h
107
{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */
sys/dev/pci/unichromemode.h
108
{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */
sys/dev/pci/unichromemode.h
109
{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */
sys/dev/pci/unichromemode.h
110
{VIACR, CR32, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
111
{VIACR, CR33, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
112
{VIACR, CR34, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
113
{VIACR, CR35, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
114
{VIACR, CR36, 0x08, 0x00},
sys/dev/pci/unichromemode.h
115
{VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */
sys/dev/pci/unichromemode.h
116
{VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */
sys/dev/pci/unichromemode.h
117
{VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */
sys/dev/pci/unichromemode.h
118
{VIACR, CR69, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
119
{VIACR, CR6A, 0xFF, 0x40},
sys/dev/pci/unichromemode.h
120
{VIACR, CR6B, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
121
{VIACR, CR6C, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
122
{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */
sys/dev/pci/unichromemode.h
123
{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */
sys/dev/pci/unichromemode.h
124
{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */
sys/dev/pci/unichromemode.h
125
{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */
sys/dev/pci/unichromemode.h
126
{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */
sys/dev/pci/unichromemode.h
127
{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */
sys/dev/pci/unichromemode.h
128
{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */
sys/dev/pci/unichromemode.h
129
{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */
sys/dev/pci/unichromemode.h
130
{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */
sys/dev/pci/unichromemode.h
131
{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */
sys/dev/pci/unichromemode.h
132
{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */
sys/dev/pci/unichromemode.h
133
{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */
sys/dev/pci/unichromemode.h
134
{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */
sys/dev/pci/unichromemode.h
135
{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */
sys/dev/pci/unichromemode.h
136
{VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */
sys/dev/pci/unichromemode.h
137
{VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
sys/dev/pci/unichromemode.h
138
{VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */
sys/dev/pci/unichromemode.h
139
{VIACR, CR8B, 0xFF, 0x69}, /* LCD Power Sequence Control 0 */
sys/dev/pci/unichromemode.h
140
{VIACR, CR8C, 0xFF, 0x57}, /* LCD Power Sequence Control 1 */
sys/dev/pci/unichromemode.h
141
{VIACR, CR8D, 0xFF, 0x00}, /* LCD Power Sequence Control 2 */
sys/dev/pci/unichromemode.h
142
{VIACR, CR8E, 0xFF, 0x7B}, /* LCD Power Sequence Control 3 */
sys/dev/pci/unichromemode.h
143
{VIACR, CR8F, 0xFF, 0x03}, /* LCD Power Sequence Control 4 */
sys/dev/pci/unichromemode.h
144
{VIACR, CR90, 0xFF, 0x30}, /* LCD Power Sequence Control 5 */
sys/dev/pci/unichromemode.h
145
{VIACR, CR91, 0xFF, 0xA0}, /* 24/12 bit LVDS Data off */
sys/dev/pci/unichromemode.h
146
{VIACR, CR96, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
147
{VIACR, CR97, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
148
{VIACR, CR99, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
149
{VIACR, CR9B, 0xFF, 0x00}
sys/dev/pci/unichromemode.h
171
{VIACR,CR32,0xFF,0x00},
sys/dev/pci/unichromemode.h
172
{VIACR,CR33,0xFF,0x00},
sys/dev/pci/unichromemode.h
173
{VIACR,CR34,0xFF,0x00},
sys/dev/pci/unichromemode.h
174
{VIACR,CR35,0xFF,0x00},
sys/dev/pci/unichromemode.h
175
{VIACR,CR36,0xFF,0x31},
sys/dev/pci/unichromemode.h
176
{VIACR,CR41,0xFF,0x80},
sys/dev/pci/unichromemode.h
177
{VIACR,CR42,0xFF,0x00},
sys/dev/pci/unichromemode.h
178
{VIACR,CR5D,0x80,0x00}, /* Horizontal Retrace Start bit [11] should be 0*/
sys/dev/pci/unichromemode.h
179
{VIACR,CR62,0xFF,0x00}, /* Secondary Display Starting Address*/
sys/dev/pci/unichromemode.h
180
{VIACR,CR63,0xFF,0x00}, /* Secondary Display Starting Address*/
sys/dev/pci/unichromemode.h
181
{VIACR,CR64,0xFF,0x00}, /* Secondary Display Starting Address*/
sys/dev/pci/unichromemode.h
182
{VIACR,CR68,0xFF,0x67}, /* Default FIFO For IGA2 */
sys/dev/pci/unichromemode.h
183
{VIACR,CR69,0xFF,0x00},
sys/dev/pci/unichromemode.h
184
{VIACR,CR6A,0xFF,0x40},
sys/dev/pci/unichromemode.h
185
{VIACR,CR6B,0xFF,0x00},
sys/dev/pci/unichromemode.h
186
{VIACR,CR6C,0xFF,0x00},
sys/dev/pci/unichromemode.h
187
{VIACR,CR77,0xFF,0x00}, /* LCD scaling Factor*/
sys/dev/pci/unichromemode.h
188
{VIACR,CR78,0xFF,0x00}, /* LCD scaling Factor */
sys/dev/pci/unichromemode.h
189
{VIACR,CR79,0xFF,0x00}, /* LCD scaling Factor*/
sys/dev/pci/unichromemode.h
190
{VIACR,CR9F,0x03,0x00}, /* LCD scaling Factor */
sys/dev/pci/unichromemode.h
191
{VIACR,CR7A,0xFF,0x01}, /* LCD Scaling Parameter 1*/
sys/dev/pci/unichromemode.h
192
{VIACR,CR7B,0xFF,0x02}, /* LCD Scaling Parameter 2*/
sys/dev/pci/unichromemode.h
193
{VIACR,CR7C,0xFF,0x03}, /* LCD Scaling Parameter 3 */
sys/dev/pci/unichromemode.h
194
{VIACR,CR7D,0xFF,0x04}, /* LCD Scaling Parameter 4*/
sys/dev/pci/unichromemode.h
195
{VIACR,CR7E,0xFF,0x07}, /* LCD Scaling Parameter 5*/
sys/dev/pci/unichromemode.h
196
{VIACR,CR7F,0xFF,0x0A}, /* LCD Scaling Parameter 6*/
sys/dev/pci/unichromemode.h
197
{VIACR,CR80,0xFF,0x0D}, /* LCD Scaling Parameter 7*/
sys/dev/pci/unichromemode.h
198
{VIACR,CR81,0xFF,0x13}, /* LCD Scaling Parameter 8*/
sys/dev/pci/unichromemode.h
199
{VIACR,CR82,0xFF,0x16}, /* LCD Scaling Parameter 9*/
sys/dev/pci/unichromemode.h
200
{VIACR,CR83,0xFF,0x19}, /* LCD Scaling Parameter 10*/
sys/dev/pci/unichromemode.h
201
{VIACR,CR84,0xFF,0x1C}, /* LCD Scaling Parameter 11*/
sys/dev/pci/unichromemode.h
202
{VIACR,CR85,0xFF,0x1D}, /* LCD Scaling Parameter 12*/
sys/dev/pci/unichromemode.h
203
{VIACR,CR86,0xFF,0x1E}, /* LCD Scaling Parameter 13*/
sys/dev/pci/unichromemode.h
204
{VIACR,CR87,0xFF,0x1F}, /* LCD Scaling Parameter 14*/
sys/dev/pci/unichromemode.h
205
{VIACR,CR88,0xFF,0x40}, /* LCD Panel Type */
sys/dev/pci/unichromemode.h
206
{VIACR,CR89,0xFF,0x00}, /* LCD Timing Control 0 */
sys/dev/pci/unichromemode.h
207
{VIACR,CR8A,0xFF,0x88}, /* LCD Timing Control 1*/
sys/dev/pci/unichromemode.h
208
{VIACR,CR8B,0xFF,0x69}, /* LCD Power Sequence Control 0*/
sys/dev/pci/unichromemode.h
209
{VIACR,CR8C,0xFF,0x57}, /* LCD Power Sequence Control 1*/
sys/dev/pci/unichromemode.h
210
{VIACR,CR8D,0xFF,0x00}, /* LCD Power Sequence Control 2*/
sys/dev/pci/unichromemode.h
211
{VIACR,CR8E,0xFF,0x7B}, /* LCD Power Sequence Control 3*/
sys/dev/pci/unichromemode.h
212
{VIACR,CR8F,0xFF,0x03}, /* LCD Power Sequence Control 4*/
sys/dev/pci/unichromemode.h
213
{VIACR,CR90,0xFF,0x30}, /* LCD Power Sequence Control 5*/
sys/dev/pci/unichromemode.h
214
{VIACR,CR91,0xFF,0xA0}, /* 24/12 bit LVDS Data off*/
sys/dev/pci/unichromemode.h
215
{VIACR,CR96,0xFF,0x00},
sys/dev/pci/unichromemode.h
216
{VIACR,CR97,0xFF,0x00},
sys/dev/pci/unichromemode.h
217
{VIACR,CR99,0xFF,0x00},
sys/dev/pci/unichromemode.h
218
{VIACR,CR9B,0xFF,0x00},
sys/dev/pci/unichromemode.h
219
{VIACR,CR9D,0xFF,0x80},
sys/dev/pci/unichromemode.h
220
{VIACR,CR9E,0xFF,0x80}
sys/dev/pci/unichromemode.h
239
{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */
sys/dev/pci/unichromemode.h
240
{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */
sys/dev/pci/unichromemode.h
241
{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */
sys/dev/pci/unichromemode.h
242
{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */
sys/dev/pci/unichromemode.h
243
{VIACR, CR33, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
244
{VIACR, CR55, 0x80, 0x00},
sys/dev/pci/unichromemode.h
245
{VIACR, CR5D, 0x80, 0x00},
sys/dev/pci/unichromemode.h
246
{VIACR, CR36, 0xFF, 0x01}, /* Power Management 3 */
sys/dev/pci/unichromemode.h
247
{VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */
sys/dev/pci/unichromemode.h
248
{VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */
sys/dev/pci/unichromemode.h
249
{VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */
sys/dev/pci/unichromemode.h
250
{VIACR, CR68, 0xFF, 0x67}, /* Default FIFO For IGA2 */
sys/dev/pci/unichromemode.h
251
{VIACR, CR6A, 0x20, 0x20}, /* Extended FIFO On */
sys/dev/pci/unichromemode.h
252
{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */
sys/dev/pci/unichromemode.h
253
{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */
sys/dev/pci/unichromemode.h
254
{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */
sys/dev/pci/unichromemode.h
255
{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */
sys/dev/pci/unichromemode.h
256
{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */
sys/dev/pci/unichromemode.h
257
{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */
sys/dev/pci/unichromemode.h
258
{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */
sys/dev/pci/unichromemode.h
259
{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */
sys/dev/pci/unichromemode.h
260
{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */
sys/dev/pci/unichromemode.h
261
{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */
sys/dev/pci/unichromemode.h
262
{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */
sys/dev/pci/unichromemode.h
263
{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */
sys/dev/pci/unichromemode.h
264
{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */
sys/dev/pci/unichromemode.h
265
{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */
sys/dev/pci/unichromemode.h
266
{VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */
sys/dev/pci/unichromemode.h
267
{VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
sys/dev/pci/unichromemode.h
268
{VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */
sys/dev/pci/unichromemode.h
269
{VIACR, CR8B, 0xFF, 0x2D}, /* LCD Power Sequence Control 0 */
sys/dev/pci/unichromemode.h
270
{VIACR, CR8C, 0xFF, 0x2D}, /* LCD Power Sequence Control 1 */
sys/dev/pci/unichromemode.h
271
{VIACR, CR8D, 0xFF, 0xC8}, /* LCD Power Sequence Control 2 */
sys/dev/pci/unichromemode.h
272
{VIACR, CR8E, 0xFF, 0x36}, /* LCD Power Sequence Control 3 */
sys/dev/pci/unichromemode.h
273
{VIACR, CR8F, 0xFF, 0x00}, /* LCD Power Sequence Control 4 */
sys/dev/pci/unichromemode.h
274
{VIACR, CR90, 0xFF, 0x10}, /* LCD Power Sequence Control 5 */
sys/dev/pci/unichromemode.h
275
{VIACR, CR91, 0xFF, 0xA0}, /* 24/12 bit LVDS Data off */
sys/dev/pci/unichromemode.h
276
{VIACR, CR96, 0xFF, 0x03}, /* TV on DVP0 ; DVP0 Clock Skew */
sys/dev/pci/unichromemode.h
277
{VIACR, CR97, 0xFF, 0x03}, /* TV on DFP high ; DFPH Clock Skew */
sys/dev/pci/unichromemode.h
278
{VIACR, CR99, 0xFF, 0x03}, /* DFP low ; DFPL Clock Skew */
sys/dev/pci/unichromemode.h
279
{VIACR, CR9B, 0xFF, 0x07} /* DVI on DVP1 ; DVP1 Clock Skew */
sys/dev/pci/unichromemode.h
294
{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */
sys/dev/pci/unichromemode.h
295
{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */
sys/dev/pci/unichromemode.h
296
{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */
sys/dev/pci/unichromemode.h
297
{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */
sys/dev/pci/unichromemode.h
298
{VIACR, CR32, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
299
{VIACR, CR33, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
300
{VIACR, CR34, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
301
{VIACR, CR35, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
302
{VIACR, CR36, 0x08, 0x00},
sys/dev/pci/unichromemode.h
303
{VIACR, CR47, 0xC8, 0x00}, /* Clear VCK Plus. */
sys/dev/pci/unichromemode.h
304
{VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */
sys/dev/pci/unichromemode.h
305
{VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */
sys/dev/pci/unichromemode.h
306
{VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */
sys/dev/pci/unichromemode.h
307
{VIACR, CRA3, 0xFF, 0x00}, /* Secondary Display Starting Address */
sys/dev/pci/unichromemode.h
308
{VIACR, CR69, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
309
{VIACR, CR6A, 0xFF, 0x40},
sys/dev/pci/unichromemode.h
310
{VIACR, CR6B, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
311
{VIACR, CR6C, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
312
{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */
sys/dev/pci/unichromemode.h
313
{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */
sys/dev/pci/unichromemode.h
314
{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */
sys/dev/pci/unichromemode.h
315
{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */
sys/dev/pci/unichromemode.h
316
{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */
sys/dev/pci/unichromemode.h
317
{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */
sys/dev/pci/unichromemode.h
318
{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */
sys/dev/pci/unichromemode.h
319
{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */
sys/dev/pci/unichromemode.h
320
{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */
sys/dev/pci/unichromemode.h
321
{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */
sys/dev/pci/unichromemode.h
322
{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */
sys/dev/pci/unichromemode.h
323
{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */
sys/dev/pci/unichromemode.h
324
{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */
sys/dev/pci/unichromemode.h
325
{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */
sys/dev/pci/unichromemode.h
326
{VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */
sys/dev/pci/unichromemode.h
327
{VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
sys/dev/pci/unichromemode.h
328
{VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */
sys/dev/pci/unichromemode.h
329
{VIACR, CRD4, 0xFF, 0x81}, /* Second power sequence control */
sys/dev/pci/unichromemode.h
330
{VIACR, CR8B, 0xFF, 0x5D}, /* LCD Power Sequence Control 0 */
sys/dev/pci/unichromemode.h
331
{VIACR, CR8C, 0xFF, 0x2B}, /* LCD Power Sequence Control 1 */
sys/dev/pci/unichromemode.h
332
{VIACR, CR8D, 0xFF, 0x6F}, /* LCD Power Sequence Control 2 */
sys/dev/pci/unichromemode.h
333
{VIACR, CR8E, 0xFF, 0x2B}, /* LCD Power Sequence Control 3 */
sys/dev/pci/unichromemode.h
334
{VIACR, CR8F, 0xFF, 0x01}, /* LCD Power Sequence Control 4 */
sys/dev/pci/unichromemode.h
335
{VIACR, CR90, 0xFF, 0x01}, /* LCD Power Sequence Control 5 */
sys/dev/pci/unichromemode.h
336
{VIACR, CR91, 0xFF, 0x80}, /* 24/12 bit LVDS Data off */
sys/dev/pci/unichromemode.h
337
{VIACR, CR96, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
338
{VIACR, CR97, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
339
{VIACR, CR99, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
340
{VIACR, CR9B, 0xFF, 0x00},
sys/dev/pci/unichromemode.h
341
{VIACR, CRD2, 0xFF, 0x03} /* LVDS0/LVDS1 Channel format. */
sys/dev/pci/unichromemode.h
357
{VIACR,CR32,0xFF,0x00},
sys/dev/pci/unichromemode.h
359
{VIACR,CR34,0xFF,0x00},
sys/dev/pci/unichromemode.h
360
{VIACR,CR35,0xFF,0x00},
sys/dev/pci/unichromemode.h
361
{VIACR,CR36,0x08,0x00},
sys/dev/pci/unichromemode.h
362
{VIACR,CR6A,0xFF,0x80},
sys/dev/pci/unichromemode.h
363
{VIACR,CR6A,0xFF,0xC0},
sys/dev/pci/unichromemode.h
365
{VIACR,CR55,0x80,0x00},
sys/dev/pci/unichromemode.h
366
{VIACR,CR5D,0x80,0x00},
sys/dev/pci/unichromemode.h
372
{VIACR,CR7A,0xFF,0x01}, // LCD Parameter 1
sys/dev/pci/unichromemode.h
373
{VIACR,CR7B,0xFF,0x02}, // LCD Parameter 2
sys/dev/pci/unichromemode.h
374
{VIACR,CR7C,0xFF,0x03}, // LCD Parameter 3
sys/dev/pci/unichromemode.h
375
{VIACR,CR7D,0xFF,0x04}, // LCD Parameter 4
sys/dev/pci/unichromemode.h
376
{VIACR,CR7E,0xFF,0x07}, // LCD Parameter 5
sys/dev/pci/unichromemode.h
377
{VIACR,CR7F,0xFF,0x0A}, // LCD Parameter 6
sys/dev/pci/unichromemode.h
378
{VIACR,CR80,0xFF,0x0D}, // LCD Parameter 7
sys/dev/pci/unichromemode.h
379
{VIACR,CR81,0xFF,0x13}, // LCD Parameter 8
sys/dev/pci/unichromemode.h
380
{VIACR,CR82,0xFF,0x16}, // LCD Parameter 9
sys/dev/pci/unichromemode.h
381
{VIACR,CR83,0xFF,0x19}, // LCD Parameter 10
sys/dev/pci/unichromemode.h
382
{VIACR,CR84,0xFF,0x1C}, // LCD Parameter 11
sys/dev/pci/unichromemode.h
383
{VIACR,CR85,0xFF,0x1D}, // LCD Parameter 12
sys/dev/pci/unichromemode.h
384
{VIACR,CR86,0xFF,0x1E}, // LCD Parameter 13
sys/dev/pci/unichromemode.h
385
{VIACR,CR87,0xFF,0x1F}, // LCD Parameter 14
