VAX_NBPG
i = (int)alloc(VAX_NBPG + 128*sizeof(scb_vec[0])) + VAX_PGOFSET;
scb_vec = (struct ivec_dsp *)(i + VAX_NBPG);
mapaddr = (int *)nexaddr + VAX_NBPG;
mapaddr = (int *)nexaddr + VAX_NBPG;
mapaddr = (int *)nexaddr + VAX_NBPG;
npag = (voff + size) / VAX_NBPG;
for(mapnr=0, nsize=size;(nsize+VAX_NBPG)>0;nsize-=VAX_NBPG)
#define IOSPSZ ((64*1024) / VAX_NBPG) /* 64k == 128 pages */
#define VAX_PGOFSET (VAX_NBPG - 1)
#define VAX_NPTEPG (VAX_NBPG / 4)
#define REDZONEADDR (VAX_NBPG*3) /* Must be > sizeof(struct pcb) */
virtual_avail += (count) * VAX_NBPG;
avail_start += (count) * VAX_NBPG;
((char *)(l)->l_addr + (REDZONEADDR + VAX_NBPG))
(USPACE - (REDZONEADDR + VAX_NBPG))
#define VM_PHYS_SIZE (USRIOSIZE*VAX_NBPG)
#define NI_IOSIZE (128 * VAX_NBPG) /* IO address size */
ioaccess((vaddr_t)qv_addr, QVADDR, (QVSIZE/VAX_NBPG));
sc->uv_size = UBAPAGES * VAX_NBPG;
#define UBASIZE ((UBAPAGES + UBAIOPAGES) * VAX_NBPG)
#define UIOPAGE(x) (UMEM750(x) + (UBAPAGES * VAX_NBPG))
mapp = (int *)vax_map_physmem(QBAMAP, QBASIZE/VAX_NBPG);
paddr += VAX_NBPG, pgnum += 1) {
start*VAX_NBPG, pgnum*VAX_NBPG - 1);
vax_sgmap_reserve(start*VAX_NBPG,
(pgnum - start)*VAX_NBPG, &sc->uv_sgmap);
vax_unmap_physmem((vaddr_t)mapp, QBASIZE/VAX_NBPG);
start*VAX_NBPG, pgnum*VAX_NBPG - 1);
vax_sgmap_reserve(start*VAX_NBPG, (pgnum - start)*VAX_NBPG,
#define QBASIZE (8192 * VAX_NBPG)
sc->uh_ibase = VAX_NBPG + ubaddr * VAX_NBPG;
uba_attach(&sc->uv_sc, UMEM(sa,ubaddr) + (UBAPAGES * VAX_NBPG));
#define UBASIZE (UBAPAGES * VAX_NBPG)
sc->uv_size = UBAPAGES * VAX_NBPG;
#define UBASIZE ((UBAPAGES + UBAIOPAGES) * VAX_NBPG)
#define UIOPAGE (UMEM730 + (UBAPAGES * VAX_NBPG))
ioaccess(va, pa, (size + VAX_NBPG - 1) >> VAX_PGSHIFT);
#define NEXPAGES (sizeof(struct nexus) / VAX_NBPG)
(KA420_CH2_SIZE / VAX_NBPG));
(KA43_CT2_SIZE/VAX_NBPG));
(KA650_CACHESIZE/VAX_NBPG));
char bootram[KA820_BRPAGES * VAX_NBPG];
char eeprom[KA820_EEPAGES * VAX_NBPG];
(IOAMAPSIZ / VAX_NBPG));
(IOAMAPSIZ / VAX_NBPG));
vax_unmap_physmem((vaddr_t)sbiar, (IOAMAPSIZ / VAX_NBPG));
avail_end += VAX_NBPG * 128;
VAX_NBPG, /* quantum */
int error = vmem_add(iomap_arena, iospace + VAX_NBPG,
(IOSPSZ - 1) * VAX_NBPG, VM_NOSLEEP);
addr = uvm_km_alloc(kernel_map, size * VAX_NBPG, 0,
error = vmem_alloc(iomap_arena, size * VAX_NBPG,
uvm_km_free(kernel_map, addr, size * VAX_NBPG, UVM_KMF_VAONLY);
vmem_free(iomap_arena, addr, size * VAX_NBPG);
for (count = pstart; count < pend; count += VAX_NBPG) {
start = pmap->pm_p1lr * VAX_NBPG;
end = lr * VAX_NBPG;
memset(a, 0, VAX_NBPG);
kvmsize += (IOSPSZ * VAX_NBPG);
usrptsize = (1024*1024*1024)/VAX_NBPG; /* 1GB total VM */
usrptsize = (avail_end/(20 * PPTESZ)) * VAX_NBPG;
virtual_end = KERNBASE + sysptsize * VAX_NBPG;
pv_table = (struct pv_entry *)(scratch + SCRATCHPAGES * VAX_NBPG);
vaddr = (br - (int *)Sysmap) * VAX_NBPG + 0x80000000;
vaddr = (br - (int *)pm->pm_p0br) * VAX_NBPG;
vaddr = (br - (int *)pm->pm_p1br) * VAX_NBPG + 0x40000000;
#define NEXPAGES (sizeof(struct nexus) / VAX_NBPG)
#define NEXPAGES (sizeof(struct nexus) / VAX_NBPG)
scb_vec = (struct ivec_dsp *)(vavail + (scb_size * VAX_NBPG));
for (i = 0; i < (scb_size * VAX_NBPG)/4; i++) {
* scb_size * VAX_NBPG;
len += VAX_NBPG;
for (; va < endva; va += VAX_NBPG, pte++, map->_dm_ptecnt++) {
ptsize = (sgvasize / VAX_NBPG) * sizeof(struct pte);
VAX_NBPG, /* quantum */
#define NEXPAGES (sizeof(struct nexus) / VAX_NBPG)
virtual_avail += VAX_NBPG;
virtual_avail += VAX_NBPG;
virtual_avail += VAX_NBPG;
regaddr = (long*)vax_map_physmem(LCG_REG_ADDR, (LCG_REG_SIZE/VAX_NBPG));
ioaccess((vaddr_t)regaddr, LCG_REG_ADDR, (LCG_REG_SIZE/VAX_NBPG));
((lcg_fb_size + LCG_FONT_STORAGE_SIZE)/VAX_NBPG));
lutaddr = (void *)vax_map_physmem(LCG_LUT_ADDR, (LCG_LUT_SIZE/VAX_NBPG));
fifoaddr = (long*)vax_map_physmem(LCG_FIFO_WIN_ADDR, (LCG_FIFO_WIN_SIZE/VAX_NBPG));
ioaccess((vaddr_t)lcgaddr, LCG_FB_ADDR, (lcg_fb_size/VAX_NBPG));
ioaccess((vaddr_t)lutaddr, LCG_LUT_ADDR, (LCG_LUT_SIZE/VAX_NBPG));
ioaccess((vaddr_t)fifoaddr, LCG_FIFO_WIN_ADDR, (LCG_FIFO_WIN_SIZE/VAX_NBPG));
#define LCG_FIFO_WIN_SIZE VAX_NBPG
ioaccess(virtual_avail, SMADDR, SMSIZE / VAX_NBPG);
virtual_avail += VAX_NBPG;
iounaccess((vaddr_t)ss->ss_addr, SMSIZE / VAX_NBPG);
(void *)vax_map_physmem(SMADDR, SMSIZE / VAX_NBPG);
SMSIZE / VAX_NBPG);
SMSIZE / VAX_NBPG);
ioaccess((vaddr_t)regaddr, raddr, rsize/VAX_NBPG);
ioaccess((vaddr_t)regaddr1, r1addr, r1size/VAX_NBPG);
regaddr = (long*)vax_map_physmem(raddr, rsize/VAX_NBPG);
regaddr1 = (long*)vax_map_physmem(r1addr, r1size/VAX_NBPG);
int fbsize = (spx_fb_size + FONT_STORAGE_SIZE)/VAX_NBPG;
virtual_avail += VAX_NBPG;
virtual_avail += VAX_NBPG;
virtual_avail += VAX_NBPG;
virtual_avail += VAX_NBPG;
int fbsize = SPXg_WIN_SIZE/VAX_NBPG;
virtual_avail += VAX_NBPG;
ioaccess(sc->sc_dmaaddr, dbase, dsize/VAX_NBPG);
pte = (struct pte *) vax_map_physmem(KA49_SCSIMAP, mapsize / VAX_NBPG);
t->_wsize = ptecnt * VAX_NBPG;
BUA(sc->uh_uba)->bn_vor = VAX_NBPG + (VAX_NBPG * allocvec++);
uba_attach(sc, BUA(sc->uh_uba)->bn_biic.bi_sadr + UBAPAGES * VAX_NBPG);
MAPVIRT(qvmem[0], 64 * 1024 * NQD / VAX_NBPG);
pmap_map((int)qd_ubaio, QIOPAGE, QIOPAGE + UBAIOPAGES * VAX_NBPG,