sys/arch/algor/pci/vtpbcreg.h

21

#define V96X_PCI_VENDOR(vt) V96XH(vt, 0x00)

sys/arch/algor/pci/vtpbcreg.h

22

#define V96X_PCI_DEVICE(vt) V96XH(vt, 0x02)

sys/arch/algor/pci/vtpbcreg.h

23

#define V96X_PCI_CMD(vt) V96XH(vt, 0x04)

sys/arch/algor/pci/vtpbcreg.h

24

#define V96X_PCI_STAT(vt) V96XH(vt, 0x06)

sys/arch/algor/pci/vtpbcreg.h

38

#define V96X_LB_MAP0(vt) V96XH(vt, 0x5e)

sys/arch/algor/pci/vtpbcreg.h

39

#define V96X_LB_MAP1(vt) V96XH(vt, 0x62)

sys/arch/algor/pci/vtpbcreg.h

40

#define V96X_LB_BASE2(vt) V96XH(vt, 0x64) /* B.2 only */

sys/arch/algor/pci/vtpbcreg.h

41

#define V96X_LB_MAP2(vt) V96XH(vt, 0x66) /* B.2 only */

sys/arch/algor/pci/vtpbcreg.h

44

#define V96X_FIFO_CFG(vt) V96XH(vt, 0x70)

sys/arch/algor/pci/vtpbcreg.h

45

#define V96X_FIFO_PRIORITY(vt) V96XH(vt, 0x72)

sys/arch/algor/pci/vtpbcreg.h

46

#define V96X_FIFO_STAT(vt) V96XH(vt, 0x74)

sys/arch/algor/pci/vtpbcreg.h

49

#define V96X_SYSTEM(vt) V96XH(vt, 0x78)

sys/arch/algor/pci/vtpbcreg.h

62

#define V96X_LB_MAIL_IEWR(vt) V96XH(vt, 0xd0)

sys/arch/algor/pci/vtpbcreg.h

63

#define V96X_LB_MAIL_IERD(vt) V96XH(vt, 0xd2)

sys/arch/algor/pci/vtpbcreg.h

64

#define V96X_PCI_MAIL_IEWR(vt) V96XH(vt, 0xd4)

sys/arch/algor/pci/vtpbcreg.h

65

#define V96X_PCI_MAIL_IERD(vt) V96XH(vt, 0xd6)

sys/arch/algor/pci/vtpbcreg.h

66

#define V96X_MAIL_WR_STAT(vt) V96XH(vt, 0xd8)

sys/arch/algor/pci/vtpbcreg.h

67

#define V96X_MAIL_RD_STAT(vt) V96XH(vt, 0xdc)