UVM_PROT_WRITE
hppa_prot[UVM_PROT_WRITE] = TLB_AR_RW;
if ((prot & UVM_PROT_WRITE) == 0) {
if ((prot & UVM_PROT_WRITE) == 0) {
UVM_PROT_READ|UVM_PROT_WRITE,
if ((prot & UVM_PROT_WRITE) != 0 && (ttreg & TTR40_W) != 0) {
if ((prot & (UVM_PROT_READ|UVM_PROT_WRITE)) &&
if ((prot & (UVM_PROT_READ|UVM_PROT_WRITE|UVM_PROT_EXEC)) == 0) {
if ((prot & (UVM_PROT_READ|UVM_PROT_WRITE)) != 0 &&
if (prot & UVM_PROT_WRITE) {
if (prot & UVM_PROT_WRITE) {
c_bits = (prot & UVM_PROT_WRITE) ? rw_c_bits : ro_c_bits;
if (prot & UVM_PROT_WRITE) {
removing_write = (prot & UVM_PROT_WRITE) == 0;
pmap_make_pte(pa, UVM_PROT_READ | UVM_PROT_WRITE, flags);
pmap_make_pte(dst, UVM_PROT_READ | UVM_PROT_WRITE, flags);
UVM_PROT_READ | UVM_PROT_WRITE,
ptp_pa, UVM_PROT_READ | UVM_PROT_WRITE,
bool need_write = !!(prot & UVM_PROT_WRITE);
mmu_range_is_tt(va, len, UVM_PROT_WRITE, &map_flags) ||
pmap_enter(pmap_kernel(), va, pa, UVM_PROT_READ|UVM_PROT_WRITE,
pmap_enter(pmap_kernel(), va, pa, UVM_PROT_READ|UVM_PROT_WRITE,
UVM_PROT_WRITE);
UVM_PROT_READ | UVM_PROT_WRITE, PMAP_NOCACHE);
bool need_write = !!(prot & UVM_PROT_WRITE);
mmu_range_is_tt(va, len, UVM_PROT_WRITE, &map_flags) ||