US_PDC
if (AT91PDC_FIFO_PREREAD(sc->sc_iot, sc->sc_ioh, sc->sc_dmat, US_PDC,
at91usart_writereg(sc, US_PDC + PDC_PTCR, PDC_PTCR_TXTDIS | PDC_PTCR_RXTDIS);
at91usart_writereg(sc, US_PDC + PDC_PTCR, PDC_PTCR_TXTEN);
at91usart_writereg(sc, US_PDC + PDC_PTCR, PDC_PTCR_TXTDIS);
AT91PDC_FIFO_POSTWRITE(sc->sc_iot, sc->sc_ioh, sc->sc_dmat, US_PDC,
US_PDC, &sc->sc_tx_fifo, PDC_BLOCK_SIZE)) {
at91usart_writereg(sc, US_PDC + PDC_PTCR, PDC_PTCR_TXTDIS | PDC_PTCR_RXTDIS);
at91usart_writereg(sc, US_PDC + PDC_TNCR, 0);
at91usart_writereg(sc, US_PDC + PDC_TCR, 0);
at91usart_writereg(sc, US_PDC + PDC_RNCR, 0);
at91usart_writereg(sc, US_PDC + PDC_RCR, 0);
AT91PDC_RESET_FIFO(sc->sc_iot, sc->sc_ioh, sc->sc_dmat, US_PDC, &sc->sc_rx_fifo, 0);
AT91PDC_RESET_FIFO(sc->sc_iot, sc->sc_ioh, sc->sc_dmat, US_PDC, &sc->sc_tx_fifo, 1);
at91usart_writereg(sc, US_PDC + PDC_PTCR, PDC_PTCR_RXTEN);
AT91PDC_FIFO_POSTREAD(sc->sc_iot, sc->sc_ioh, sc->sc_dmat, US_PDC,
at91usart_writereg(sc, US_PDC + PDC_PTCR, \
at91usart_writereg(sc, US_PDC + PDC_RNCR, 0); \
at91usart_writereg(sc, US_PDC + PDC_RCR, 0); \
at91usart_writereg(sc, US_PDC + PDC_TNCR, 0); \
at91usart_writereg(sc, US_PDC + PDC_TCR, 0); \
US_PDC + PDC_TCR) && !sc->sc_tx_busy) {
US_PDC + PDC_PTCR, PDC_PTCR_TXTEN);
US_PDC + PDC_PTCR, PDC_PTCR_TXTDIS);
|| bus_space_read_4(sc->sc_iot, sc->sc_ioh, US_PDC + PDC_PTSR) & PDC_PTSR_TXTEN) {
US_PDC + PDC_PTCR, PDC_PTCR_TXTEN);
US_PDC + PDC_PTCR, PDC_PTCR_TXTDIS);