sys/arch/hpcmips/tx/txcom.c

1193

reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));

sys/arch/hpcmips/tx/txcom.c

315

ofs = TX39_UARTCTRL1_REG(slot);

sys/arch/hpcmips/tx/txcom.c

335

ofs = TX39_UARTCTRL1_REG(slot);

sys/arch/hpcmips/tx/txcom.c

389

reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));

sys/arch/hpcmips/tx/txcom.c

395

tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);

sys/arch/hpcmips/tx/txcom.c

408

int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);

sys/arch/hpcmips/tx/txcom.c

427

ofs = TX39_UARTCTRL1_REG(chip->sc_slot);

sys/arch/hpcmips/tx/txcom.c

450

ofs = TX39_UARTCTRL1_REG(txcom_chip.sc_slot);

sys/arch/hpcmips/tx/txcom.c

495

int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);

sys/arch/hpcmips/tx/txcom.c

538

int ofs = TX39_UARTCTRL1_REG(chip->sc_slot);

sys/arch/hpcmips/tx/txcom.c

609

reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));

sys/arch/hpcmips/tx/txcom.c

611

tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);

sys/arch/hpcmips/tx/txcom.c

620

tx_conf_write(tc, TX39_UARTCTRL1_REG(slot), reg);