BME1000_REG
#define IHPHY_MII_LED2 BME1000_REG(0, 28)
#define IHPHY_MII_LED3 BME1000_REG(0, 29)
#define IHPHY_MII_DCR BME1000_REG(0, 30)
#define IHPHY_MII_DSR BME1000_REG(0, 31)
#define HV_SMB_ADDR BME1000_REG(768, 26)
#define IHPHY_MII_ECR2 BME1000_REG(0, 18)
#define IHPHY_MII_LCR BME1000_REG(0, 19)
#define IHPHY_MII_RXERR BME1000_REG(0, 20)
#define IHPHY_MII_MIR BME1000_REG(0, 21)
#define IHPHY_MII_CFG BME1000_REG(0, 22)
#define IHPHY_MII_ECR BME1000_REG(0, 23)
#define IHPHY_MII_IMR BME1000_REG(0, 24)
#define IHPHY_MII_ISR BME1000_REG(0, 25)
#define IHPHY_MII_ESR BME1000_REG(0, 26)
#define IHPHY_MII_LED1 BME1000_REG(0, 27)
#define BM_CS_STATUS BME1000_REG(0, 17)
#define BME1000_PHY_PAGE_SELECT BME1000_REG(0, 22) /* Page Select */
#define HV_OEM_BITS BME1000_REG(0, 25)
#define HV_M_STATUS BME1000_REG(0, 26)
#define HV_LED_CONFIG BME1000_REG(0, 30)
#define HV_KMRN_MODE_CTRL BME1000_REG(BM_PORT_CTRL_PAGE, 16)
#define BM_PORT_GEN_CFG BME1000_REG(BM_PORT_CTRL_PAGE, 17)
#define I82579_DFT_CTRL BME1000_REG(BM_PORT_CTRL_PAGE, 20)
#define CV_SMB_CTRL BME1000_REG(BM_PORT_CTRL_PAGE, 23)
#define BM_RATE_ADAPTATION_CTRL BME1000_REG(BM_PORT_CTRL_PAGE, 25)
#define HV_KMRN_FIFO_CTRLSTA BME1000_REG(770, 16)
#define HV_PM_CTRL BME1000_REG(770, 17)
#define I217_INBAND_CTRL BME1000_REG(770, 18)
#define IGP3_KMRN_DIAG BME1000_REG(770, 19)
#define I217_LPI_GPIO_CTRL BME1000_REG(772, 18)
#define I82579_LPI_CTRL BME1000_REG(772, 20)
#define I217_MEMPWR BME1000_REG(772, 26)
#define I217_PLL_CLOCK_GATE_REG BME1000_REG(772, 28)
#define I217_CFGREG BME1000_REG(772, 29)
#define HV_MUX_DATA_CTRL BME1000_REG(776, 16)
#define I82579_UNKNOWN1 BME1000_REG(776, 20)
#define I218_ULP_CONFIG1 BME1000_REG(779, 16)
#define BM_RCTL BME1000_REG(BM_WUC_PAGE, 0)
#define BM_WUC BME1000_REG(BM_WUC_PAGE, 1)
#define BM_WUFC BME1000_REG(BM_WUC_PAGE, 2)
#define I217_PROXY_CTRL BME1000_REG(BM_WUC_PAGE, 70)
#define BM_RAR_L(_i) (BME1000_REG(BM_WUC_PAGE, 16 + ((_i) << 2)))
#define BM_RAR_M(_i) (BME1000_REG(BM_WUC_PAGE, 17 + ((_i) << 2)))
#define BM_RAR_H(_i) (BME1000_REG(BM_WUC_PAGE, 18 + ((_i) << 2)))
#define BM_RAR_CTRL(_i) (BME1000_REG(BM_WUC_PAGE, 19 + ((_i) << 2)))
#define BM_MTA(_i) (BME1000_REG(BM_WUC_PAGE, 128 + ((_i) << 1)))
#define BME1000_PHY_SPEC_CTRL BME1000_REG(0, 16) /* PHY Specific Control */
rv = sc->phy.readreg_locked(dev, 2, BME1000_REG(769, 23), &data);
rv = sc->phy.writereg_locked(dev, 2, BME1000_REG(769, 23), data);
rv = sc->phy.readreg_locked(dev, 2, BME1000_REG(769, 16), &data);
rv = sc->phy.writereg_locked(dev, 2, BME1000_REG(769, 16), data);
rv = sc->phy.writereg_locked(dev, 2, BME1000_REG(776, 23),