TLB_I
TLB_PG_SIZE, TLB_I | TLB_G);
ppc4xx_tlb_reserve(BASE_ISA, BASE_ISA, TLB_PG_SIZE, TLB_I | TLB_G);
ppc4xx_tlb_reserve(BASE_FB, BASE_FB, TLB_PG_SIZE, TLB_I | TLB_G);
ppc4xx_tlb_reserve(BASE_FB2, BASE_FB2, TLB_PG_SIZE, TLB_I | TLB_G);
TLB_I | TLB_G);
TLB_I | TLB_G);
TLB_PG_SIZE, TLB_I | TLB_G);
0xef000000, TLB_PG_SIZE, TLB_I | TLB_G);
SAM460EX_PCIMEM_VA + va, TLB_PG_SIZE, TLB_I | TLB_G);
SAM460EX_PCIPREFMEM_VA + va, TLB_PG_SIZE, TLB_I | TLB_G);
SAM460EX_PCIIO_VA, TLB_PG_SIZE, TLB_I | TLB_G);
SAM460EX_PCICFG_VA, TLB_PG_SIZE, TLB_I | TLB_G);
SAM460EX_PCIE0CFG_VA, TLB_PG_SIZE, TLB_I | TLB_G);
SAM460EX_PCIE1CFG_VA, TLB_PG_SIZE, TLB_I | TLB_G);
SAM460EX_PCIE1XCFG_VA, TLB_PG_SIZE, TLB_I | TLB_G);
SAM460EX_PCIE0MEM_VA, TLB_PG_SIZE, TLB_I | TLB_G);
SAM460EX_PCIE1MEM_VA, TLB_PG_SIZE, TLB_I | TLB_G);
SAM460EX_AHB_VA, TLB_PG_SIZE, TLB_I | TLB_G);
ppc4xx_tlb_reserve(OPB_BASE, endva, maxsz, TLB_I | TLB_G);
ppc4xx_tlb_reserve(TFT_FB_BASE, endva, TFT_FB_SIZE, TLB_I | TLB_G);
TLB_PG_SIZE, TLB_I | TLB_G);
lo |= TLB_I;
#define TTE_I TLB_I
tlblo & TLB_I ? 'I' : ' ',