sys/arch/arm/amlogic/meson6_timer.c

150

TIMER_WRITE(sc, MESON_TIMER_MUX, mask);

sys/arch/arm/imx/imx23_timrot.c

179

TIMER_WRITE(sc, HW_TIMROT_TIMCTRL0, ctrl);

sys/arch/arm/imx/imx23_timrot.c

185

TIMER_WRITE(sc, HW_TIMROT_TIMCTRL1, ctrl);

sys/arch/arm/imx/imx23_timrot.c

211

TIMER_WRITE(sc, HW_TIMROT_TIMCTRL0_CLR, HW_TIMROT_TIMCTRL0_IRQ);

sys/arch/arm/imx/imx23_timrot.c

223

TIMER_WRITE(sc, HW_TIMROT_TIMCTRL1_CLR, HW_TIMROT_TIMCTRL1_IRQ);

sys/arch/arm/nvidia/tegra_timer.c

146

TIMER_WRITE(sc, TMR1_PTV_REG,

sys/arch/arm/nvidia/tegra_timer.c

148

TIMER_WRITE(sc, TMR1_PCR_REG, TMR_PCR_INTR_CLR);

sys/arch/arm/nvidia/tegra_timer.c

159

TIMER_WRITE(sc, TMR1_PCR_REG, TMR_PCR_INTR_CLR);

sys/arch/arm/sunxi/sunxi_hstimer.c

110

TIMER_WRITE(sc, HS_TMR_IRQ_STAS_REG, stas);

sys/arch/arm/sunxi/sunxi_hstimer.c

167

TIMER_WRITE(sc, HS_TMR_IRQ_EN_REG, 0);

sys/arch/arm/sunxi/sunxi_hstimer.c

168

TIMER_WRITE(sc, HS_TMR_IRQ_STAS_REG, TIMER_READ(sc, HS_TMR_IRQ_STAS_REG));

sys/arch/arm/sunxi/sunxi_hstimer.c

170

TIMER_WRITE(sc, HS_TMR0_CTRL_REG, 0);

sys/arch/arm/sunxi/sunxi_hstimer.c

171

TIMER_WRITE(sc, HS_TMR0_INTV_LO_REG, ~0u);

sys/arch/arm/sunxi/sunxi_hstimer.c

172

TIMER_WRITE(sc, HS_TMR0_INTV_HI_REG, ~0u);

sys/arch/arm/sunxi/sunxi_hstimer.c

173

TIMER_WRITE(sc, HS_TMR0_CTRL_REG,

sys/arch/arm/sunxi/sunxi_timer.c

127

TIMER_WRITE(sc, TMR_IRQ_STAS_REG, stas);

sys/arch/arm/sunxi/sunxi_timer.c

156

TIMER_WRITE(sc, TMR_IRQ_EN_REG, irq_en | TMR_IRQ_EN(0));

sys/arch/arm/sunxi/sunxi_timer.c

221

TIMER_WRITE(sc, TMR_IRQ_EN_REG, 0);

sys/arch/arm/sunxi/sunxi_timer.c

222

TIMER_WRITE(sc, TMR_IRQ_STAS_REG, TIMER_READ(sc, TMR_IRQ_STAS_REG));

sys/arch/arm/sunxi/sunxi_timer.c

224

TIMER_WRITE(sc, TMR0_INTV_VALUE_REG, rate / hz);

sys/arch/arm/sunxi/sunxi_timer.c

225

TIMER_WRITE(sc, TMR0_CTRL_REG,

sys/arch/arm/sunxi/sunxi_timer.c

229

TIMER_WRITE(sc, TMR2_INTV_VALUE_REG, ~0u);

sys/arch/arm/sunxi/sunxi_timer.c

230

TIMER_WRITE(sc, TMR2_CTRL_REG,

sys/arch/arm/sunxi/sunxi_timer.c

234

TIMER_WRITE(sc, TMR4_INTV_VALUE_REG, ~0u);

sys/arch/arm/sunxi/sunxi_timer.c

235

TIMER_WRITE(sc, TMR4_CTRL_REG, TMR4_CTRL_RELOAD | TMR4_CTRL_EN);

sys/arch/arm/sunxi/sunxi_timer.c

258

TIMER_WRITE(sc, LOSC_CTRL_REG, reg);

sys/arch/arm/sunxi/sunxi_timer.c

264

TIMER_WRITE(sc, LOSC_CTRL_REG, reg & ~LOSC_CTRL_OSC32K_SEL);

sys/arch/arm/ti/am18xx_timer.c

87

TIMER_WRITE(sc, AM18XX_TIMER_TCR, 0);

sys/arch/arm/ti/am18xx_timer.c

89

TIMER_WRITE(sc, AM18XX_TIMER_TGCR, AM18XX_TIMER_TGCR_TIMMODE32_UNCHAINED

sys/arch/arm/ti/am18xx_timer.c

92

TIMER_WRITE(sc, AM18XX_TIMER_TIM12, 0);

sys/arch/arm/ti/am18xx_timer.c

93

TIMER_WRITE(sc, AM18XX_TIMER_TIM34, 0);

sys/arch/arm/ti/am18xx_timer.c

95

TIMER_WRITE(sc, AM18XX_TIMER_PRD12, timer_interval);

sys/arch/arm/ti/am18xx_timer.c

96

TIMER_WRITE(sc, AM18XX_TIMER_PRD34, 0);

sys/arch/arm/ti/am18xx_timer.c

98

TIMER_WRITE(sc, AM18XX_TIMER_TCR, AM18XX_TIMER_TCR_ENAMODE12_CONTINUOUS);