TCX_REG_DFB8
sc->sc_physaddr[TCX_REG_DFB8].oa_space,
sc->sc_physaddr[TCX_REG_DFB8].oa_base,
{ TCX_USER_RAM, 0, TCX_REG_DFB8 },
{ TCX_USER_RAM_COMPAT, 0, TCX_REG_DFB8 },
sc->sc_physaddr[TCX_REG_DFB8].oa_base + offset, 0, prot,